Semi-universa CMOS Xtal OSC

)

ged

=A0 =A0 =A0 =A0 Xlo (Khz)

arking | =A0Measured

-------

=A0 =A0 32 =A0| =A0 32.7711

=A0 =A0 =A0 | =A0 32.7710

=A0 32.7721

---+-----------

=A0100 =A0| =A0100.0033

=A0 =A0 | =A0100.0042

-----+-----------

=A0200 =A0| =A0200.0951

-------

0 =A0| 1000.386

=A0 =A0 Xhi (Mhz)

king =A0 | =A0Measured

-------+-----------

2.000 =A0 =A0| 2.000188

=A0 | 2.000179

---------+-----------

579545 | 3.580152

-----------

=A010.000 =A0 | 10.003115

-----+-----------

=A0 =A012.000 =A0 | 12.007229

I expect the "32kHz" Xtal is a true 32768Hz so 32771 isn't all that far out. But the slightly high frequencies suggest that you haven't got the capacitive loads matched to the crystals. You may find Fig 5 in the following datasheet for ultra low power oscillator modules helpful in this regard.

Don't forget that these tiny low power Xtals do not like being driven hard (they die young that way).

Regards, Martin Brown

On the tuning fork types, i know the max power is 1uW (hence the

680K) and the capacitive load rating is 10pF. Strays added to the shown 10pF add to almost the 20pF required in a Pierce circuit. All of the higher frequencies point to parallel mode resonance and not the desired series resonance mode. Then again, the Fairchild APP Note 340 (1983) indicates that a CMOS gate makes a mediocre oscillator WRT a transistor or FET, and it draws more power and is less stable.

Excess loop gain permits oscillations at other than the desired frequency. So lower gain is better.

That's why transistors and FETs (and slower CMOS) are "better" in this context--they yield more stable oscillators.

(That 74AC02's a brute! The 74hcu04 is more traditional in this role.)

James Arthur

...so, are you saying that even tho the 680K seems to give a reasonable drive, that there *still* is excess gain? Am going to try the old CD series gate (buffered as per a number of articles) to see what happens. BTW, the present circuit does not oscillate properly with a 50Mhz crystal; it is erratic in that every cycle is a different sub-multiple of the rated frequency. So far, i hae no crystals between 10Mhz and 50 Mhz.

...so, are you saying that even tho the 680K seems to give a reasonable drive, that there *still* is excess gain? Am going to try the old CD series gate (buffered as per a number of articles) to see what happens. BTW, the present circuit does not oscillate properly with a 50Mhz crystal; it is erratic in that every cycle is a different sub-multiple of the rated frequency. So far, i hae no crystals between 10Mhz and 50 Mhz.

Yes.

That AN-340 estimates a voltage gain >10k for buffered HC gates, in the 100's for unbuffered. You *want* a gain closer to 3-5 or so. That's usually enough to cover the losses and yield a loop gain just over unity.

The unbuffered gates have 1 internal stage rather than 3, lower gain, and less phase delay. All those characteristics make for a more stable oscillator.

You're exciting multiple modes. The trick for such an overtone crystal--which it almost certainly is--is to bandselect a single mode with an L-C, and ensure loop gain

The old CD gates are the pitts; not capable of "high" frequencies. So..if one just needs a Q&D oscillator, the semi-universal CMOS scheme would fit the bill.

Yep.

--James Arthur

Minimum reliable operating voltage appears to be 2.5V and operation may be more stable and accurate.