I am amazed by the number of helpful replies this post received. Thank you.
We are thinking about this product, and though I cannot elaborate , the real IP is the 'xxxx' that will be using the hardware (amplifier+dsp) etc and we are going to go and patent the 'xxxx' and the methods of using 'xxx'. In the end, electronic hardware will be duplicated by others and is not the bread and butter of the product
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K
keith
Just remember, a patent is only as good as your lawyers and is only valid until your money runs out.
Keith
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Erik Walthinsen
Just inadvertantly ran into a slick way of doing this. While designing a (simple, through-hole) board in Eagle, I changed the top and bottom copper pours to Hatched instead of Solid. If done on more than 2 layers, especially if you can get the hatching to misregister between the layers (at least in my particular case they align perfectly), I can't see how anyone could possibly derive a board layout via X-ray without going utterly and irrevocably insane:
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- Omega aka Erik Walthinsen
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Wouter van Ooijen (www.voti.nl
But I guess there are various outfits that have a double bed-of-nails. Put the PCB between the nails, press the button, and voila, a list of electrically connected points. No doubt your potential reverse-engineer will know where to find such a service.
Wouter van Ooijen
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Webshop for PICs and other electronics
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Guy Macon
Interesting idea! Maybe you could rotate one of the two hatching patterns by 45 degrees and make the spacing different.
K
keith
Still doesn't beat a continutiy tester and a little time. These things are simple to RE. A decade or so ago I had a high security crypto design. The "secure processor" was wound in about a half-mile of wire, bridged to detect intrusion, with environmental sensors and the whole nine yards. There was no pretense of stopping anyone from copying the design, only the data within. Physical designs are easy to copy.
OTOH, you might want to look at the Xilinx FPGA security. I'm not convinced it's worth it, but that's an issue for each design.
Keith
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Tim Hubberstey
If the board uses BGA packages and blind vias, you can have connections that never see the light of day. The only way to use the continuity check method on these boards is to strip the BGAs off first. Not a show stopper, but it might discourage some pirates.
I used to work in the arcade video game industry and we were loosing roughly 60% of our sales to piracy. We had a couple of complex programmable parts on the boards that were there strictly as an anti-piracy measure. If the secured Xilinx parts were available back then, I guarantee we would have looked very seriously at them.
Xilinx CPLDs start at under a dollar..... Maybe you could put some function in a very cheap micro - Atmel ATTiny11 is about 40 cents...
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Guy Macon
I would imagine that anyone who is willing to lay out a board, buy the parts, install them and then to sell the result will not be bothered by the slight extra amount of work it takes to remove a few BGAs.
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Tim Hubberstey
I agree, in general, but removing BGAs without trashing the blind vias takes specialized equipment and *may* discourage some low-budget pirates.
If you're dealing with pirates with serious money to spend, even ASICs will only delay them slightly. This is why I like "soft" solutions like FPGAs. We used Actel parts because the FAE assured us that even stripping layers from the die would not reveal which anti-fuses were programmed. The Xilinx encrypted bitstream security sounds pretty secure too and definitely warrants further investigation.
Then, use capacitive coupling within the board to achieve 'things'. Fun to trace :)
Thomas
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Ken Smith
Add some strip lines to do RF things and you may make progress.
There is a technology to embed some components within the PCB. You could put some coupling capacitors within the substrate. This would slow them down a little more.
You can also do inductive components as traces and clamp the cores onto the PCB.
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kensmith@rahul.net forging knowledge
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Guy Macon
That *would* be difficult to reverse-engineer.
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