This story may not be quiteover yet :) Just for experiment purpose, this morning I changed Q2 for a TLC555 wired as a fast output buffer. I was using successfully this chip as strong output buffer in the past. I sligthly increased the value of R5 to the threshhold of pin 4 (reset) of the 555 which is anyway closed to a bipolar threshold. The result was dramatic. Transmission was excellent up to 115K. The output is a nice square wave. So it seems the circuit also need some muscles at the output.
You need a faster optocoupler with trigger schmitd gate like PC900 or H11L1 or equivalents (there are quite many). All works ok, no auxiliary hardware is necessary.
I was wondering why it didn't seem to work at 115k. The simulations showed it should go even higher. But I didn't mention the loading issues as you had already switched to the faster units. You can get a rough idea of the timing requirements needed to decode NRZ. The reciprocal of the frequency gives the width of the bit cell. Here's an example for 115Kb/sec. (This ignores the 9 or 10-bits needed for the start bit and parity.)
Twid = 1 / freq = 1 / 115e3 = 8.69uS
Ideally, you sample in the middle of the window. So in a perfect system, you would have half the window available for bitshift:
Tsamp = Twid / 2 = 8.69 / 2 = 4.34uS
That is the maximum available timing margin if everything were perfect.
There are many issues that eat into your margins, such as the RS-232 clock timing ambiguity, asymmetrical rise and fall times anywhere in the system, and so on. You have to assign a maximum error to each one, and make sure you still have enough margin left over to meet the required error rate. To do this, you have to go through each part of the system and determine the minimum and maximum timing tolerances, which is sometimes very difficult to do.
One way to start is to simply divide the margin in half, and ensure the part with the worst performance is less than that. For example, the optocoupler would normally be the worst part of the system, so you need it to meet a timing variation of less than 4.34uS / 2 = 2.17uS
This means the difference in propagation delay between Ton and Toff must be less than 2uS. An ordinary 4N36 won't meet that requirement, but the Charge Clamp circuit can easily do it if you ensure it is symmetrical.
Anyway, the original problem seems to be too much loading, which you fixed with the 555. Congratulations!
You misinterpreted the OP's post. He didn't look at a USB signal, he looked at the (allegedly RS232) output of a USB-to-serial converter dongle as well as his computer serial port. In other words, he compared two claimed RS232 transmitters that are fast to one that is slow.
Perhaps the dongle and computer were built (either cheaply or intentionally) without slew rate limiting.
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