There's a part of the circuit that appears to allow the device to
> auto-select between USB bus power and wall-brick power, that looks sort
> of like this:
>
> NDS352P 1N5817
> [VBUS>---+--+--[S G D]---->|--+-[+5V>
> | | | |
> | | | |
> [VREG>---|--|-----|------->|--+
> \\ | \\ 1N5817
> 100k / =.1uF / 33k
> \\ | \\
> | | |
> +--+-----+--| GND
>
That doesn't look like an auto-select circuit to me.
I think I accidentally put a cross where there was supposed to be a joint. The correction is where VREG crosses between the gate and the
33k resistor:
The selector appears in context on page 54 of the board's datasheet:
Whoops PSM
On a sunny day (Sat, 13 Oct 2007 12:29:57 -0400) it happened "Peter S. May" wrote in :
A safer way to draw is to avoid crossing wires altogether in case of a connection: NDS352P 1N5817 [VBUS>---------[S G D]---->|----[+5V>
| | | | | | |------->|-- [VREG>---|--|-----| \\ | \\ 1N5817 100k / =.1uF / 33k \\ | \\ | | | ------------| GND
That makes much more sense, the presence of Vreg turns off the Vbus feed. You will find that the majority of enhancement mode MOSFET applications are as "load switches" and, as the name implies, they are used as a simple switch. The foremost parameters are the VGS,th, gate-to-source threshold voltage, and RDS,on, the on state drain-to-source channel resistance. Apply a gate-source bias well in excess of VGS,th and the MOSFET state changes from a leaky drain-source open circuit to a low resistance channel. N-channel devices require a positive VGS, to attract negatively charged electrons into the N type channel, and P-channel devices require a negative VGS, to attract positively charged holes into the P type channel. A zero or reverse VGS puts the MOSFET in a high impedance state.
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