Ramp Type Oscillator with Bottom Release

Jim Thompson · 2017-09-13T20:20:07+00:00

Ramp Type Oscillator with Bottom Release In the past I did this (in bipolar), so that I got a near-zero release of the "dump" function by sensing saturation... ... easy with bipolar devices. Any ideas on how to do it similarly with CMOS? (Comparators sensing near zero are risky with CMOS due to crappy offset voltages.) For the leftists in the crowd (too high a percentage ;-) this IS ON-TOPIC. ...Jim Thompson -- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | STV, Queen Creek, AZ 85142 Skype: skypeanalog | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at | 1962 | I'm looking for work... see my website. Thinking outside the box...producing elegant & economic solutions.

Sep 13, 2017 43 Replies

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dagmargoodboat 8 years ago

I wasn't trying to design the whole thing, just offering a suggestion on how to increase the swing.

The timing capacitor waveform is the ramp. If you need it to be linear, a current source accomplishes that.

Once you have the excess swing, I was expecting you'd clamp and limit it to whatever range you wanted, and make your sawtooth. For example,

Vdd -+- | (_) | i.t (_) v (e.g., 10nA) | | D1 +----->|-----. | | |\ Ct | |\ | .---| >o---||---+-----| >0---+---> | |/ (A) |/ | | U1a U1b | '----------------------------'

The above produces a sawtooth ramp from (Vth - Vdd) to Vth, or (Vth.falling - Vdd) to Vth.rising if you use a Schmitt.

Total swing is precisely Vdd regardless of Vth, or (Vdd - hysteresis) for a Schmitt.

It's always good to fly beyond the rails :-)

Why do you need U4A? Couldn't you take the feedback from U1A.2 and save an inverter?

Cheers, James Arthur

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bitrex 8 years ago

Cascode current mirror with 1.2 volts supply? I'd think you'd lose more in headroom at the "top" than you'd gain in trying to squeeze every mV out of the "bottom."

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dagmargoodboat 8 years ago

I think he's talking about using the cascoded mirror at the bottom, shaving a tad off the bottom end too, but yes, if Jim's found a reliable way to generate the signal he needs, to plug into a scheme he's already comfortable with, that counts as a 'win.'

The sawtooth generator I suggested (above) avoids any mirror headroom problems by making voltage comparisons at Vdd/2, and offsetting the whole waveform downward.

Variable time delays are then easily generated by buffering the ramp then feeding a second constant current into a resistor, producing a programmable time offset.

e.g.: i.delay -+- |\ | |\ ramp>--| >--[R]--+----| >o--> out |/ |/ buffer CMOS

That seemed an interesting scheme to me.

But we have no idea what Jim's actual constraints are. If he's found something that works for him, that's what matters, right?

Cheers, James Arthur

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dagmargoodboat 8 years ago

Correction: (Vdd *+* hysteresis) for a Schmitt.

Cheers, James Arthur

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