Power Supply Regulation

I want to tap into the power of a circa 1980 digital board to power my own board. My question is whether the 5V coming from this old board is clean enough to use directly or if I should add my own power management circuitry.

The device is powered from 120Vac, goes through a transformer to step down to 10Vac, goes through a bridge rectifier, then enters an LM340-5. Is this 5V output clean enough for use with an Atmel AVR? Were parts on the older board (old NMOS parts such as the MOS 6522) more tolerant of noisy supplies?

Pete

Reply to
Suudy
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Noise margin of CMOS has remained the same since its inception. There will be no problem. Just be sure to put a power entry capacitor on your Atmel board right at the 5V/GND wire attachment point of 1uF or 10x the combined decoupling capacitance in your circuit, whichever is larger...

Reply to
Fred Bloggs

A couple of questions.

  1. The older board is NMOS, not CMOS. Is this difference significant?
  2. Noise margin is a function of I/O (Voh an Vol). I'm not sure how this relates to a noisy power supply. Can you clarify?

Pete

Reply to
Suudy

NMOS predates me so I don't know much about it, but see below...

CMOS noise margin is huge, typically a full 1/3 of power supply, which is 1.7V for a 5V system. A real bad supply is maybe 100mV noise, the CMOS will not even see it. CMOS is the safest and most noise immune logic family in existence. It would VERY unusual for the old power supply to cause problems. You could measure the noise with a scope instead of asking hypothetical questions...

Reply to
Fred Bloggs

I still don't see how a noisy power supply relates to noise margin. Assuming 5V I/O, I can see how noise can appear on the outputs, and the large noise margin is useful. But internally to the parts, I'm not so sure how tolerant they are to a noisy supply. That is where I was going. What about internal PLL's (such as for USB)? This is my confusion.

The datasheets, such as for the AT90USB64/128 make no mention of power cleanliness. Is there some unwritten rule of thumb that everyone uses?

If I had a few grand laying around that my wife would let me spend on a scope, I could do that. But even if I did measure it, it would not answer the question of how clean it needs to be. What is tolerable? Tens of mV of ripple? Hundreds?

Pete

Reply to
Suudy

You may want to check the capacitors due the age.

Reply to
sky465nm

--
http://www.interfacebus.com/Logic_Family_Noise_Margin.html

JF
Reply to
John Fields

Sorry, I was trying to be generic. I figured with the small geometries used (I don't know what process Atmel uses, but it probably is smaller than the old 2u days), that power supply noise would be a much bigger issue nowadays. And with the advanced peripheral options and internal PLLs, noise seems even more of an issue.

So if they don't specifically mention it, than as long as the noise doesn't cause the noise margins to go to hell, it is probably fine then?

"Cheap" is relative. More than about $50, and I get an earful. My wife is a bigger penny pincher than my boss. Seems I have to budget my homebrew projects farther in advance with her than with my boss.

Perhaps I'll br> >I still don't see how a noisy power supply relates to noise margin.

Thanks for the link. I wasn't aware that noise on the power supply could propogate that much into the I/O. Granted, the output drivers are powered, but I figured with bypass caps and internal capacitance, it wouldn't have that much of an effect.

Reply to
Suudy

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