Plugs for bare PCB holes

Search pogo-pins and/or pogo-beds. You might also take a look at

press-fit sockets are still a thing, but reading more of your message suggests thay are not what you're after.

I seem to recall a patent and a high price. "tag connect"

tens of dollars, high price for a hobbyist.

Digikey has them.

I need something with retention, so a plug with spring loaded pin is not ideal.

The Tag-Connect looks interesting, and is on some STM32 development boards, however the plug is 10mm x 6mm. I don't really have room for the

Many thanks.

Many thanks - I found them, as per my reply to DemonicTubes, I don't really have room for the 6mm dimension.

how much room do you have?

The old HP-35 calculator had single sprung pins that contacted the inside of plated holes on the daughter board.

I suppose you could roll your own out of "kinky-pin" test points or other compliant pin connectors. Lots around but seem mostly intended for permanent solder-less connection. You might be able to finesse the plated hole diameter to get a reusable solution?

piglet

Regards,

Boris Mohar

Got Knock? - see: Viatrack Printed Circuit Designs (among other things)

void _-void-_ in the obvious place

Den fredag den 2. marts 2018 kl. 23.36.43 UTC+1 skrev Mike Perkins:

push-fit exist but that's permanent

how about a regular header and offset holes?

If the board is loose, push it down onto a bed-of-nails fixture with pogo pins against test points. If the board is already mounted, consider adding the program functions to an existing connector: just wire a 'special' variant of the connector to substitute in, for the test/configure bench. With the right thickness of PCB boaard, an A-style USB plug is a minimal card-edge connection scheme.

Plated-through holes are rather delicate items, it's perilous to do multiple insertions into them.

I'm currently using a 4 way 0.1" header, so a nominal 2.5mm x 10mm

This would need just the one or two insertions.

An interesting idea. Thanks

Could you use square pins in round holes? You might have to screw around with the hole size.

George H.

Sent on my tablet. I'm in LA at the March APS meeting.

them, but they are advertized for just your requirements:

There seem to be only 2-row versions, so if they are to big for you, you might get creative and cut away one row and/or the coding pins to save some space.

cu Michael

What ever you look at keep in mind that many connectors are rated for a limited lifespan. If you are using this for test the test fixture will need to survive many, many cycles. Most won't.

Rick C.

A good trick is to do testing in socket layers. Working from master tester to test fixture, a working ZIF socket is bolted down in the tester and is hidden and protected as much as possible. The next layer up is a semi-permanent test fixture, again using a ZIF; next layer has a ZIF for the DUT. This top ZIF takes the wear and tear and could last a few thousand insertions. 1K times 1K times 1K makes for a decent lifetime in a production environment. Trying for another layer and factor of 1K is counter-productive, because that leaning tower ain't too reliable.

Your ZIF tower design brings to mind a somewhat similar feature found on a board under my purview, but not designed by me. As shown in the photograph [1] a two digit LED display is situated at the top of two stacked wirewrap sockets. The corner pins of all devices in the stack are soldiered. So the stack apparently only serves to enhance the readability of the LED display. It's not a sacrificial part. OTOH, the stacked SMA barrel connectors on my VNA [2] are sacrificial by design. Their job is to bear the brunt of wear and tear.

Note.

1. formatting link
2. formatting link

Thank you,

I'd think stacked ZIF sockets would be pretty poor electrically. I've always seen production test fixtures with one ZIF socket and pogo pins for the interface between the test fixture and the instrument.

I wouldn't think so. Why would the display need to be changed often? I used what looks like the same connectors some time back, for the same reason. It an option on a $20M mainframe. ;-)