I have a bit of an identity crisis wrt to hand routing in that I never seem to be able to get my boards to look nice (subjective, I know). I generally use XY routing which is easy to do but doesn't really give nice flowing results. Maze routing OTOH gives better results but is a) more ted ious due to the fact you've got to rip up tracks a lot and b) feels wrong.
I know it's probably a matter of more experience but any tips would be grea tly appreciated. It's primarily for through-hole stuff btw. For some reason SMT routing seems easier, aside from having branches (i.e. two IC's connec ting to a single IC using the same bus and pins, like rom+ram to a CPU).
Look nice??? If your PCB routing "looks nice" you probably are using more layers than you really need. Looks is the last thing I consider when routing a PCB. There are times when a well organized bus will look "nice", but otherwise you may be wasting your time and money trying to make a layout look "nice".
On the other hand, I *do* look for signs of high congestion and try to adjust placement or routing to minimize that. Every time you use a via you are sucking up space on all layers and making your design less efficient. That's more related to vias than to the routing itself though.
Do you have some photos of your PCBs you think could be done better?
Usually I lay out critical stuff first, low level and high frequency analog, and power for all digital devices, then take care of the rest.
Sometimes once the critical stuff is done you can just run the autorouter to complete (if the rules and algorithms are set up correctly, which is an investment in time).
Placement is absolutely critical- when it's done right, the layout becomes much easier.
And yes, it's an iterative process, and gets easier with experience. It helps if the layout software lets you easily drag things and groups of things and they stay connected and compliant with DRC rules.
SMT routing is very different IMHO- strategies are more like for single-sided PCB layout, especially if you're trying to minimize vias and maintain the integrity of a bottom ground pour on a 2-layer board.
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I don't see a lot of obvious XY routing these days. But I don't see a lot of thru-hole, either.
Placement dominates routing, so I push the parts around until the red rats nest looks promising, before routing. You can then sort of visualize the routing.
The Brat hates the red rats nest lines, so turns them off. And her boards look better than mine.
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She will do a goodly amount of pin swapping to get a nice flow.
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seem to be able to get my boards to look nice (subjective, I know).
nice flowing results. Maze routing OTOH gives better results but is a) more tedious due to the fact you've got to rip up tracks a lot and b) feels wro ng.
greatly appreciated. It's primarily for through-hole stuff btw. For some re ason SMT routing seems easier, aside from having branches (i.e. two IC's co nnecting to a single IC using the same bus and pins, like rom+ram to a CPU) .
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Hi Rick,
Fancy meeting you on this group as well :-) I've only worked on 2-layer PCB 's with ~25mhz frequencies. Here's a picture of a populated board and while it's hard to see, I'm not really that happy with it. Works fine though...
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Anyway, like I said earlier it's a mixture of both. Comparing it to old arc ade boards it's a disaster. Some real awesome routing in those older ones w hich, while also using a mixture of XY and Maze, it's just... I don't know. .. clean.
So yeah, I know routing's primary function should be signal integrity and w hat not but it's still, at least IMO, art..
For a 2-layer board, you want to prefer directional bias on both layers, and pour around everything with GND, and stitch that wherever possible.
For a 4-layer board, it's not as big a deal, and you usually have the freedom to, just kind of, route things wherever you want them to go. You can use bias if you want, but you usually have enough room to maneuver buses between and around components, on the same layer. There's certainly no point in switching layers just because you're switching directions, unless a route needs to get through there as well. (Layer changes are relatively worse on 4 layer boards, because they add holes to the inner layer ground planes!)
Now... when I say "directional bias", really what's important is, having ground pour always surrounding the routes. Traces can be grouped to save space (though at the expense of crosstalk), and groups (buses*) on opposite layers should cross at right angles, so the region where they cross, where no ground can pour over or under those traces, is minimized.
When I say "directional bias", I'm *NOT* saying that the direction need be coherent across the entirety of the board...
(*Note I'm using "bus" very loosely: a grouping of traces that happen to be physically adjacent in that area. Design-wise, it's preferred to do this with electrically similar nets (such as a proper "bus" in the usual electrical meaning), but as long as you aren't mixing bad combinations (like analog and digital traces), you can group pretty much whatever. So I mean it in a physical, visual sense.)
Really, the directional bias can vary from region to region. And if you think in this way, the appearance of the board really begins to take on more of a "flow field" kind of pattern. Imagine you have traces routed along these lines (well, but neater looking!),
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on one layer, and everywhere perpendicular (as much as possible) on the other layer.
Or the lines of electric and magnetic fields, which are everywhere crossed (well, in proper TEM modes, they are; not always the case in near fields).
So, you'd have radial lines extending from that vortex loopy area. Which might be, like, a QFP part with a lot of pins, which get fanned out radially. Power and ground swirl around on the other layer (making sure not to isolate any islands of ground, or anything).
And then maybe some of those pins need to loop around to the other side, towards that humpy thing on the left. So you route those around, but at some distance from the center, so there's room for power and ground to pour inbetween, and for routes going the other way to pass (with layer changes as needed).
I have a bit of an identity crisis wrt to hand routing in that I never seem to be able to get my boards to look nice (subjective, I know). I generally use XY routing which is easy to do but doesn't really give nice flowing results. Maze routing OTOH gives better results but is a) more tedious due to the fact you've got to rip up tracks a lot and b) feels wrong.
I know it's probably a matter of more experience but any tips would be greatly appreciated. It's primarily for through-hole stuff btw. For some reason SMT routing seems easier, aside from having branches (i.e. two IC's connecting to a single IC using the same bus and pins, like rom+ram to a CPU).
I'm not following all of this. When you say it is important to have ground pour between traces, are you talking about 2 layer boards? If you need to minimize cross talk on a two layer board you just need to not route traces on the two layers in parallel. Crosstalk between traces on the same layer is very, very slight to the point it can be effectively ignored... but then that is true for traces with a ground plane and a low impedance. I can't imagine trying to route a board where crosstalk is important and a ground plane is not used.
So why is it important to pour ground between traces? Does this become a more important factor for higher impedance traces when there is no ground plane?
eem to be able to get my boards to look nice (subjective, I know).
ice flowing results. Maze routing OTOH gives better results but is a) more tedious due to the fact you've got to rip up tracks a lot and b) feels wron g.
reatly appreciated. It's primarily for through-hole stuff btw. For some rea son SMT routing seems easier, aside from having branches (i.e. two IC's con necting to a single IC using the same bus and pins, like rom+ram to a CPU).
That's essential. I do try to keep trace routing in mind at the design stag e, which can help.
Every time we've tried a two-sided board (the last came from an acquisition), we ended up redoing it as four-layer because of EMI.
It's important to have as much ground as possible. Pouring maximizes the ground area. We do it even on multi-layer boards. I sometimes use surface pours for ground islands (around low-level analogs and power supplies). It takes a lot of vias to hold everything together, though.
If you _can_ put ground pours between all traces, it's a pretty trivial board.
Yes, 2 layer boards, and to a lesser extent, 4 layer boards.
Consider a ribbon cable. You want to use every other wire for signals, and ground the rest. This gives a ~100 ohm transmission line impedance, and modest shielding between semi-adjacent signal pairs (good enough that no logic gate will choke on it, when suitably terminated).
When ribbon is used as differential, you get something like 130 ohms per pair. You can stack pairs tightly (e.g., SCSI?), but I'd probably recommend throwing in a ground between each pair, just in case.
You want to use the same design for traces on the PCB.
On a PCB, you have some advantage over the ribbon cable, because a ground plane is present. (To be fair, you can get EMI tape for ribbons, and do almost as well!) But when traces are closer to each other than to the plane, they tend to couple better to each other.
Example: 10 mil traces on top, 10 mil gap, 62 mil FR-4, back side ground plane. Differential is 154 ohms, single trace is 187 ohms. So they're rather better coupled to each other, than to ground. (2 x 187 ohms = 374 ohms is > 154 ohms, so the pairwise coupling is dominant.)
On a 4-layer board, with an inner layer pairs build (typical), the outer dielectrics are thin (say, 10 mil of prepreg to the inner plane), and for the same other dimensions, the differential is 129 ohms and single trace is 72.2 ohms. So each trace very nearly looks like a single trace over GND with no coupling (with no coupling, diff would be 144.4 ohms -- two single traces in series).
Which is also why it's usually a big lie to route differential signals as tightly as possible: it doesn't get you anything. What matters more is the pair seeing the same common mode environments (strays from passing by switchers, discontinuities from crossing over ground plane gaps, etc.), and at the same points in time (matched trace lengths up to each discontinuity).
So on the 4 layer board, pouring the outer layers, in addition to the inner planes, isn't a big deal. The trace-to-plane coupling is quite strong, much stronger than trace-to-trace.
On the 2 layer board, pouring the outer layers is a big deal. Reserving enough space between traces to allow interleaved ground traces saves much crosstalk.
This is, of course, all weighed on the necessity of signal quality: 74HC or slower logic won't care, for boards under, say, a foot across. You'll be hard pressed to route a bus so poorly, and serpententiously (ha!), that you have signal quality issues, whether it's due to the trace's self impedance, or from coupling into others. (You're also fairly unlikely to have pairs of traces that are hugging each other for the entirety of such a route. Pairings come and go, which reduces the coupling length.)
For faster CMOS logic (74LVC, most faster CMOS MCUs, FPGAs, etc.), you'll have to keep track of these things, but for a number of reasons (pitch and pin density, circuit density, keeping routes short in general, etc.), you'll tend to use 4-layer boards (or more!) in these cases anyway. Or, it would be difficult to satisfy other constraints, in only 2 layers.
Needless to say, ECL, LVDS and so on are intrinsically transmission line systems, so however many layers you're using, you must route them correctly. And that probably demands a 4 layer board, so you're kind of stuck on options there.
Thanks for the responses everyone. I'm leaving a decent amount of space available rather than trying to cram everything together. Once it's done I'll post a picture. For the design I posted, which ran at 25mhz, I never really had any problems...
You have to look at the dimensions, as well. Traces are a lot wider than they are thick. The capacitance to ground is then higher than to the adjacent wire. The dielectric isn't the same, either.
I generally use six-layer boards with all layers the same. Putting ground on 2 and power on five has been a pretty good stackup. I have anything with controlled impedances run on 1 or 6.
But closer does make the common mode environments, well, closer. It also couples tighter so couples to other signals less. A controlled impedance is generally more important, though.
Yes. The geometry is obvious.
Simply more ground is advantageous.
In many ways, ECL requires more care than ECL. The delta-Is are much higher.
some SCSI used a twisted ribbon, the pairs were twisted, but evert few centimetres the twist stopped and the wires ran parallel for a bit to allow IDC plugs to be fitted.
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