Parallel caps in schematics

Well, I highlighted about 20 especially nasty passages before I lost interest.

Part is style, like the equation for via capacitance that is "within an order of magnitude", or the silly line on page 261 "An interesting consequence...".

How about "Combining TTL and ECL in one system without considering the design consequences is not a good idea." Does this win the Nobel Prize in Physics, or Literature?

"Exposed wiring carrying high-speed signals between circuit boards always fails FCC and VDE radiated emission tests."

Always?

Another is his obcession with return currents, and the resulting conclusions and recommendations, like straddling every signal via with ground vias. See p 261, "At the point where..."

He seriously suggests tha signals remain on the plane where they originate! (bottom of p 261.)

"Guard traces cause nothing but trouble."

His opinions on bypassing are silly.

Example 8.1 "Liz has designed..." is absurd.

And more.

He challenges people to debate him on these issues. Of course, it will cost you $1200 to get into the seminar to debate him.

John

"Second, bring the VCC track to the capacitor on as THIN a track as possible. Thin tracks have high impedance, so RF currents won't want to go down that track much."

"The best caps for general purpose bypass use, are surface mount thin film caps."

There, I saved everybody the trouble to actually look at this folklore.

John

"RST Engineering (jw)"

The real number is circa 350 kHz with a Q of about 0.05

- so there is a VERY broad impedance minimum.

Try using some real numbers instead of making them up

Hint:

The series inductance of most through hole caps is close to * 16 nH * - SMD ones are even lower.

....... Phil

It's because most people don't really understand what's happening but what they do usually works, so they become convinced they are right.

I know one guy who uses no bypass caps at all, and his stuff works too.

Actually, a lot of lore is based on single or 2-side boards, but multilayer boards with ground and power planes changed things a lot.

John

I made nothing up, techtard. I used 20 nh per inch for lead and pcb trace and found that most bypass caps had somewhere between 2 and 4 inches between capacitor and IC. Do the math, idiot child.

Correct, techtard. Add the pcb trace to the equation.

Jim

"RST Engineering (jw)" = Utter S*IT HEAD

A. Snipped out of sight by this vile " RST " lying pile of S*IT.

You just plucked completely stupid numbers out of your stinking ARSE.

Quotes:

" The 10 uf capacitor has a self-resonance down in the hertz region, "

" the 0.1 uf in the kilohertz region, "

" The 10 uf is worthless for bypassing at MHz. "

All of them are totally WRONG !!!

Being a congenitally gutless piece of sub human vermin

- YOU snipped them all OUT OF SIGHT.

Go straight into HELL you CRIMINAL pile of S*IT.

...... Phil

What do you find incorrect about this:

Do you use through- hole ceramics with 4 inch leads?

Well I don't agree with everything the man says the reasoning behind the use of multiple caps in parallel is valid. This was the original question.

Since you seem to be an expert in the subject and dismiss all literature, maybe you should write a book. This way you could enlighten the rest of us peons who just muddle are way through.

I would say that multilayer ceramics are the "best" for general purpose bypass use. Thin film capacitors seem to be relatively large (hence higher ESL), expensive and only available in values

MLCCs certainly aren't thin films. They are classic screened/fired cermet stuff, definitely "thick film."

Thin film caps are usually SiO2 on silicon, but thin film really means "vacuum deposited electrode(s)" so I guess some polymer caps qualify.

John

Thinfilms are expensive and the biggest I've seen was in the ballpark of 100 pF.

Nope, surface-mount MLCC's, usually 0.33 uF 0603. These are thick-films.

"Reasoning" means opinions and guessing?

Why would a 0.33 uF cap be a worse digital-circuit bypass than, say, a

It doesn't deserve a book. I've posted the basics here several times.

Radically different theories abound, but on a decent multilayer board most any bypassing scheme just works, including the most radical, no bypass caps at all. The only common mistake is making too big a deal over it (as in hiring consultants) and using far too many (like, 20x too many) bypass caps.

John

Yes.

Best regards, Spehro Pefhany

Thanks guys. I'm understand to some degree why one would use multiple caps but I'm not sure if I "believe" it completely. Its only caues of my ignorance and I'll have to read some more. As far as I can tell though its only because of the non-ideal characteristics of caps that it is used.

Is there any books I can get that deal with this type of subject? Almost all my experience is from the theory side and I just know a few of the practical techniques used(bypass caps mainly) but would like to learn more. This is the kinda stuff you can't really find an a college text book it seems.

Thanks, Jon

I suppose we could have a debate over the exact meaning of "thick" and "thin."

John

As defined by the one true arbiter of course - Digikey!

I guess this is your third option.

I admit to using way too many bypass caps in digital cirduits. Knowing that way too many and standard rules (a few large electrolytics at power entry points, many small ceramics scattered appropriately about) always works, I save my employer the cost of the hours that would have been spent computing the exact number and placement for perfection.

That's fine, I suppose, until you get to the point where you need more layers, longer tracks and finer design rules to accommodate all the extra parts. If you are costing time then you have to add the extra routing time too.

snip

I'm not guessing excuse my wording. Any wave (excluding a pure sinusoid) consist of multiple harmonics, well you may select a cap that has the lowest Z at the fundamental Freq that your trying to filter some of the harmonics in the original signal will still pass. That is why I use several different values of caps, maybe on the order of three to six depending. I will also throw in the occasional ferrite bead. Have you come up with a new filter topology that has an ideal cut-off freq? You may want to patent that.

So the equation Z = 1/j2PIEfC is correct. Thanks for clearing that up.

Of course there are other factors that contribute to a caps performance. Parasitic's in the package being one, this is why SMT is the preferred choice the smaller the package the smaller the ESL. Ceramics being the cheapest and most widely used.

John Larkin snipped-for-privacy@highNOTlandTHIStechnologyPART.com posted to sci.electronics.design:

Gotcha, the guy is an ignorant nutter pretending to know something. "If you can't dazzle them with brilliance, baffle them with bullshit.", must be his motto.