Searching for some small components I came over that one.
Page 6 :
? Micro via SSBU allowed ? Micro via SBU to be avoided
What's the difference between SSBU and SBU vias that make the SBU to avoid?
From
So...?
Searching for some small components I came over that one.
Page 6 :
? Micro via SSBU allowed ? Micro via SBU to be avoided
What's the difference between SSBU and SBU vias that make the SBU to avoid?
From
So...?
-- Thanks, Fred.
The microvias look to be about 1/3 as deep with SSBU, no?
Best regards, Spehro Pefhany
-- "it's the network..." "The Journey is the reward" speff@interlog.com Info for manufacturers: http://www.trexon.com Embedded software/hardware/analog Info for designers: http://www.speff.com
Where did you see that? As I read it, the design rules for microvia depth are the same for SBU (Sequential Build-Up) and SSBU (Semi- Sequential Build-Up). The SSBU consists of two or more SBUs laminated together. In either case there is a limit of two layers of microvia per side per build with the current recommended process; using 2 SBUs in a SSBU allows 8 layers of uvia vice 4 with SSU and it is hard to see how this is better except for routing density. But perhaps I am missing something ...
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