It's very rare for a logic chip to have specs for output rise or fall time, or for output effective resistance. They mostly spec prop delays (with huge tolerances) and assume that we'll connect same-family parts to one another with very short traces.
grrrrrr.
John
who spent a tedious hour wiring up an ACT244 breadboard to measure this stuff. All those in/out crossovers are terrible.
--
John Larkin Highland Technology, Inc
lunatic fringe electronics
Nice. Did you rip the data and use a general-purpose plot program, or some IBIS-specific app?
I'm measuring about 2 ns, kinda slow for what I had in mind, plus a fair amount of ground bounce uglies. I recall some AC-series parts getting below 1 ns.
--
John Larkin Highland Technology, Inc
picosecond timing precision measurement
jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
Those SC70-5 are awesome. Fairchild was even a bit faster, and they have 7V abs.max. ratings. This here is in a forced 50 Ohm system, but with those 1152A active probes that would look just as good.
How long is a piece of string? If you don't understand the various factors that play into rise time, you clearly aren't qualified to use digital chips in analog circuits.
I'm in the picosecond timing business, and I understand this stuff.
If people can specify prop delay, they can surely specify rise time. Some parts, like Eclips and Gigacom, do have rise/fall specs right on the data sheet.
What's difficult about measuring the length of a piece of string?
--
John Larkin Highland Technology, Inc
picosecond timing precision measurement
jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
ors that play into rise time, you clearly aren't qualified to use digital c hips in analog circuits.
But doesn't know about ibis files, or how they document actual rise and fal l times.
10% to 90% into a well-defined load?
Fast rise and fall times are their unique selling point. For most logic use rs "fast enough" is all that is required.
People who need to treat connecting traces as transmission lines, and termi nate those transmission with their characteristic impedance, find that rise and fall times do define how picky they have to get
One guy I was in contact with had a problem which he wanted my help to solv e - when he sent me a scope trace of the signal that was giving him the pro blem, the rise and fall times were clearly too long. After I mailed him a l ittle lecture on limiting fan-out and buffering signals that needed to driv e a lot of inputs, he didn't need any more help.
You have to put the string under tension to get a reproducible length, and the tension stretches the string. Plot length versus tension - a spring bal ance lets you monitor the stretching force - and you can extrapolate back t o zero tension, which takes out that variable.
ors that play into rise time, you clearly aren't qualified to use digital c hips in analog circuits.
They only spec limits for delay with a wide margin which you indicated in m any, many posts. So would you be happy with a spec of 0.2 to 1.2 ns for a rise time spec? But then that would only apply for the specified load and likely for a specified Vcc and temperature. I suppose they could specify t he rise time over process *and* Vcc *and* temperature, but who would need t hat info? The world should specify for digital chips parameters that the d igital world doesn't need?
Nothing. But the string vendor is only going to guarantee the string is at least as long as you paid for. He isn't going to send it to NIST to have it measured for you.
You measured a parameter that won't be guaranteed and will change if any ch anges are made to the process for these chips. Your measurement will be va lid at one temperature, one Vcc and very likely only for one manufacturer o f the device.
It's your time and money. I don't get why you are whining about it not bei ng done by the manufacturer. If you are going to complain that an air pump isn't well specified for pumping water perhaps you should take it to the C haplain.
You are arguing that specs are all useless. Typical values would be helpful at least for selecting parts.
A typical problem: a central FPGA or CPU is an SPI master to multiple devices scattered around a large PCB. If you don't need to run super fast, you be sloppy about MISO and MOSI routing. CS runs are individual home-runs, so need some care at any clock rate. Clock is critical, and needs to be fanned out in all directions. Very short runs can just go. Long single-destination clocks may need to be source terminated. Multi-drop clocks may need to be end terminated. "May" and "Large" depend critically on pcb routing and chip or buffer rise times. Termination values depend on the drive impedance of the source chips.
We need to know this stuff.
So, give up using SPI? Give up all high speed design? Put an RC and a schmitt at every target device and run really slow?
Risetime never matters? In audio maybe.
If you are sufficiently creative, you can paralyze yourself and never build anything.
--
John Larkin Highland Technology, Inc
picosecond timing precision measurement
jlarkin att highlandtechnology dott com
http://www.highlandtechnology.com
Den fredag den 23. marts 2018 kl. 19.23.43 UTC+1 skrev John Larkin:
n
n:
fall
delays
parts
actors that play into rise time, you clearly aren't qualified to use digita l chips in analog circuits.
n many, many posts. So would you be happy with a spec of 0.2 to 1.2 ns for a rise time spec? But then that would only apply for the specified load a nd likely for a specified Vcc and temperature. I suppose they could specif y the rise time over process *and* Vcc *and* temperature, but who would nee d that info? The world should specify for digital chips parameters that th e digital world doesn't need?
at least as long as you paid for. He isn't going to send it to NIST to ha ve it measured for you.
changes are made to the process for these chips. Your measurement will be valid at one temperature, one Vcc and very likely only for one manufacture r of the device.
being done by the manufacturer. If you are going to complain that an air p ump isn't well specified for pumping water perhaps you should take it to th e Chaplain.
actors that play into rise time, you clearly aren't qualified to use digita l chips in analog circuits.
n many, many posts. So would you be happy with a spec of 0.2 to 1.2 ns for a rise time spec? But then that would only apply for the specified load a nd likely for a specified Vcc and temperature. I suppose they could specif y the rise time over process *and* Vcc *and* temperature, but who would nee d that info? The world should specify for digital chips parameters that th e digital world doesn't need?
at least as long as you paid for. He isn't going to send it to NIST to ha ve it measured for you.
changes are made to the process for these chips. Your measurement will be valid at one temperature, one Vcc and very likely only for one manufacture r of the device.
being done by the manufacturer. If you are going to complain that an air p ump isn't well specified for pumping water perhaps you should take it to th e Chaplain.
I am arguing the specs you are asking for have nothing to do with designing digital circuits which the part you are looking at is. But in your usual fashion you seem to think the world should revolve around you and the 50 pa rts you might order for this project.
I wonder how the rest of the world designs any circuits that work?
changes are made to the process for these chips. Your measurement will be valid at one temperature, one Vcc and very likely only for one manufacture r of the device.
You aren't talking about high speed design. SPI is not remotely high speed .
And yet people manage to build digital systems. I wonder how that happens?
ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here.
All logos and trade names are the property of their respective owners.