Latching relays

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the only thing that seems to go bad on those things. So far Deoxit has alwa ys fixed it, but I expect it's just a matter of time.

s, with a choice of Phono or SMA connectors. If you have a failed board you can reuse the resistors, but I am planning to use SMD for complete boards. I may also make a replacement for the HV output board, and the 10 MHz OCXO as well. I have a pile of them that are missing one or more of those three boards.

You're correct. It is just a custom DC to 20 MHZ three stage attenuator wit h latching relays. There is no need for >$500 modules and an interface boar d. I ran across a deal on 1000 latching Telcom relays in a sealed factory c arton. That will allow the construction of up to 250 boards at a reasonable price. The SMA connectors would be edge launched, and only used to add tho se rear panel connectors, if needed. Otherwise. it will be a drop in replac ement with a smaller footprint and possible a shield over the module that H P didn't have.

People who have never used a 3325A/B don't know what they are missing! Both have IEEE-488 interfaces, but the B model also has RS232 which makes it ea sy to program without expensive interface boards. It's too bad they were de signed before Ethernet control was common.

If you really want that, you could add a Prologix GPIB to Ethernet Controller. I'm very happy with that little gadget.

Jeroen Belleman

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wer to set or reset a mechanical latch, It doesn't matter if the relay is s ingle or double coil.

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r the HP3325A/B function generators. The original relays are long obsolete so rather than making adapter boards, I am designing a smaller board that u ses modern relays. It will also allow you to select the supply voltage for the relays, to allow the use of more common voltages.

all of them have a timer capability. Write a '1' to the DO port associated with the relay and at the same time, set time to count down x ms. The IS R associated with the timer can write a '0' to the DO port. Doesn't matter if you have an RTOS, a roll your own task scheduler, or a cyclic exec or a big loop. or, make the entire system event driven. No hw timer on the cp u? use the timer or RTC function associated with the RTOS. Busy-waits are inefficient - there is almost no reason to use them. Also, a loop with a ga zillion no-ops to implement time related events makes for non-portable code .

If I understand what you want to do is to run the latching relay as if it w ere a non-latching relay. Whatever state you want it to be in is set in th e software and held rather than pulsed. I think at least one poster thinks you want to energize one coil all the time and pulse the other coil.

If the relay won't overheat this should work. I do get your point, but I w ould vote for the pulsed operation myself.

Yes.

Absolutely no.

Indeed the question is exactly this: is there any drawback to keep one coil of a latching relay energized? We all don't care about this with non latching relay, we keep energized the single coil to maintain the NO contact closed to COM.

Connect the coils in series between the supply and ground, and connect a totem-pole driver to the midpoint.

A parallel RC network in series with each coil is the usual way to reduce dissipation while still having reliable pull-in.

One caution: in reading a relay datasheet it often seems as though there's a whole lot of slop between the guaranteed pull-in conditions and the rated coil voltage. Resist the temptation to reduce the voltage--the RC gets you the full voltage during pull-in and reduced dissipation in the hold condition. With a one-coil latching relay you can in principle use just the capacitor--I did that in the bootstrapped

Cheers

Phil Hobbs

Why use a latching relay, if you plan on keeping it energized?

There may be an issue concerning long term reliability that would only manifest itself under unpowered conditions because the magnets degrade.

A latching relay typically has 2 magnetic circuits, each one backed by its own permanent magnet. Depending on the position of the contact arm, one of the magnetic circuits is open while the other is closed. None of them is permanently magnetically reverse-biased however in normal use.

Even when one magnetic circuit is closed, the other (open) one is still only seeing an air gap, but no external reverse-biasing magnetic field because the magnets are mounted in a "series like" and not in an "anti-series like" configuration when considering both circuits together. Furthermore, even the "open" magnetic circuit still sees a significant flux through the small air gap that amounts to a "forward" bias.

However, when the coil is energized, it will create a magnetic field that is stronger than that of either permanent magnet, because it needs to actively "unlatch" the contact arm from a magnetic circuit that was closed, before it can set it moving towards the opposite position.

With a higher strength field from the coil applied, one magnetic circuit will be reinforced, but the other (now open) one will be reverse biased, even if this reverse bias would have to pass through the open air gap.

Now, commonly available "permanent" magnets are not really permanent when considered over a lifespan of decades. While they will always slowly degrade by themselves, the state of the magnetic circuit does make a difference: a permanent magnet in closed magnetic circuit will hold up very well and degrade only slowly, while in an open magnetic circuit it will degrade (demagnetize) faster. However, when reverse- biased externally, the degradation may speed up rather significantly, depending on how strong the reverse biasing external field is.

An additional effect can result from increased self-heating of the coil with higher temperatures accelerating the permanent magnet degradation, especially for a magnet that is under reverse biasing conditions.

In a normally operated latching relay this state is of no long term concern because in the passive state neither of the 2 magnets is ever reverse biased and the coil only operates in short pulses, typically alternating polarities each time, so it would not contribute any long term reverse bias in any direction either.

If driven all the time however, the coil can have an influence on the long term reliability of the permanent magnets. Unbalanced, one magnet would likely age faster than the other, slowly creating a relay that does not "hold up" well in the opposite position. Unless very strongly degraded, the relay may not fail outright, but it can become sensitive to shock and vibration, preferring to easily flip into one direction.

To avoid the relay getting "strange" (sometimes liking to flip for no good reason) when turned off, it's better to not drive it permanently.

At least, consider reducing the drive current after a short on time.

Because I need to maintain the last position when the power is cut off.

Thank you for the explanation

Really neat, but why would you do that if the two-coil versions cost basically the same and the ready-made relay driver chips (SZNUD3124DMT1G for instance) are so tiny and so cheap?

Best regards, Piotr

Capacitance. I needed to bootstrap the coil-to-contact capacitance (0.4 pF), because it would have trashed the bandwidth.

I also had to short out the 1G resistor when the amp was in 50G mode--otherwise enough of its Johnson noise would have got through the open contacts (0.2 pF) to dominate the noise floor.

The instrument was a scanning surface voltage tool, which used a 100-200 um diameter probe hovering a few tens of microns above a spinning wafer to detect sub-monolayer contamination by the change in the surface Fermi level.

(I didn't invent the technique, just the preamp.) ;)

Cheers

Phil Hobbs

snipped-for-privacy@gmail.com wrote in news: snipped-for-privacy@googlegroups.com:

Like a smart, sensitive hall effect sensor?

So instead of checking individual chips, the entire wafer spins under the detector and it senses contaminants at the micron level. That is really cool. Does it spiral out like a record album?

If so, it could probably be set up to make an audio response to the surface differences. The disco DJs would love it. Take an old wafer and then even fingerprints could register a sound. ten micron hover gap is pretty tight though. :-)

What were the bandwidths for the two gains?

Can you give us the calculation behind that? If the 50G bandwidth was modest (2Hz for 0.15pF self capacitance?), how did the 0.2pF noise feed-path figure in?

Whoa, THAT is something I have not considered! Appreciated, Phil, another goodie to know.

Best regards, Piotr

We're often struggling with a limit set by the feedback resistor's self-capacitance, which is from 0.06 to 0.15pF depending on various things. And if we're sufficiently determined, we can force the effect of the capacitance down by another factor of 10 or so, by using the trick in AoE3, Figure 8.80.C, page 545.

Yes, exactly. (CDs spiral out, records spiral in.)

It would be pretty slow for audio--maybe put its output into an audio VCO.

Cheers

Phil Hobbs

Just trying to dig this up out of my old emails--it was from 2012-3, so i forget. Here's a preliminary test result:

The bandwidth was around 10 MHz or so, because the coupling between the input signal and the TIA was capacitive, and it was the voltage we cared about. > >> I also had to short out the 1G resistor when the amp was in 50G >> mode --otherwise enough of its Johnson noise would have got >> through the open contacts (0.2 pF) to dominate the noise floor. > > Can you give us the calculation behind that? If the 50G > bandwidth was modest (2Hz for 0.15pF self capacitance?), > how did the 0.2pF noise feed-path figure in?

Since the summing junction impedance is relatively low compared with 1 G at most frequencies, the Johnson noise current of the 1G resistor splits itself between the summing junction via 0.2 pF and the parallel capacitance of the resistor, about 0.05 pF. So above the corner frequency

f_c = 1/(2 pi * 0.25 pF * 1Gohm) = 640 Hz,

about 80% of the 1G resistor's noise goes into the SJ. Since it's 7 times larger than the 50G resistor's noise, that's a noise contribution well worth going to a Form C relay to eliminate. (The eN*C noise doesn't start to dominate until about 13 kHz with the 50G resistor, so the 1G's noise would be a problem up to at least 100 kHz, and almost all the useful signal info is below there.)

Cheers

Phil Hobbs

Ah, a capacitive-coupled-input with a gain of about 10, nice!

George H.

No, this was not a TIA. The feedback element was the 0.35pF Cf self-capacitance of the 50G resistor and the associated wiring, against a 0.035pF Cin input source. G = Cf/Cin. The 50G merely provides DC zeroing, so the Cf integrated output voltage won't soar, and it makes a low-frequency rolloff. A pretty cool circuit!

Well, it's a bit of a cheat really--the 50G just sets the bias and low frequency rolloff, and then the capacitances kick in and do the real work.

Cheers

Phil Hobbs