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jfet as current source, temp dependence in-theory question

I've not used JFETs before and was thinking about them first as high impedance current sources to get started learning more about them.

(I already gather that their potentially very high input impedance and low Ciss is a good thing and I'm broadly aware that FET and BJT input opamps divide their world into low bias current vs low offset voltage camps.)

Looking over a datasheet on one, I see a chart picturing Id vs Vgs (for one specific Idss) and illustrating several curves for different temperatures. I note in this case that they all cross at Id=10mA (and on this part, that happens in the selected world of this datasheet at Vgs=-0.4V.) That suggests that setting things up for Id=10mA would seem to mitigate temperature variation in a simple current source based on this device. (Similar on the real part, but not necessarily exactly there, of course.)

However, there is a complication. I'd like that current source to also be relatively _flat_ over the Vds compliance range as well as temperature. Looking over the Id vs Vds curves, it gets pretty nice and flat but close to the pinch-off Vgs(off) and not close to Id=10mA, where the d(Vds)/d(Id) slope is closer to about 3k ohms, compared to about 26k ohms at Id=1mA. So it seems to get the temperature stability tighter I have to loosen up on stability vs Vd, in this part.

Is that generally the case for simple JFET current sources? Am I reading this wrong? (If right, are there JFETs that get both of these benefits relatively well optimized at close to the same point of operation?)

Jon

Reply to
Jon Kirwan
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Do you have any problem using an OpAmp to stabilize the whole thing? ...Jim Thompson

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Reply to
Jim Thompson

At this stage, I'm just trying to make sure I can follow the datasheet, when thinking about one of the simplest JFET circuits to use. As I wrote, I've not used them before and I'm only now starting to look more closely at them. I'm just a hobbyist and try and take things one step at a time... explore the problems first and make sure I grasp enough of the basics.

If the problem were a specific current source, a discrete JFET might not even be on the table, anyway. This is about understanding JFETs better, not building a real current sink. The current sink is a fencing foil for learning about how to read JFET datasheets and perhaps learn a little about the scattering of real JFETs that I might find, were I to look further than I have.

Jon

Reply to
Jon Kirwan

AFAIK, JFETs all behave pretty much the same way. There are only two fundamental parameters that vary with manufacture, Rds(on) and Vgs(off).

Rds(on) is the resistance of the channel when it's not pinched off at all (and not enhanced by injected charge carriers!), and ranges from ~2.5k (2N4338) to single digit ohms (J107, etc.). (I don't think anyone makes monster JFETs competitive with fractional-Rds(on) MOSFETs, nor are there really any manufacturers making HV JFETs.)

Pinchoff voltage varies from maybe -0.3V to -8V or lower. In particular, these spreads occur within the same part or family, so if you need a particular current or offset or something, you'll have to test and select parts to be sure, or make the circuit significantly adjustable.

You can plug these numbers into the JFET equation (I don't have it handy, unfortunately; check Google) and basically know everything about it (except for temperature dependancy). The variation in Rds(on), Vgs(off) and Idss are shown in Figure 10:

formatting link
You can expect other JFETs to follow a similar pattern within their respective raneg.

Temperature compensation seems to go in the same general direction (this is going to be governed by Rds(on) rising with temperature, and whatever happens to Vgs(off), which doesn't seem to be well specified?). Plots like

Tim

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Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms

"Jon Kirwan"  wrote in message 
news:7tb5s5hppprjcdacle9mticttlt7u1u9hn@4ax.com...
> At this stage, I'm just trying to make sure I can follow the
> datasheet, when thinking about one of the simplest JFET
> circuits to use.  As I wrote, I've not used them before and
> I'm only now starting to look more closely at them.  I'm just
> a hobbyist and try and take things one step at a time...
> explore the problems first and make sure I grasp enough of
> the basics.
>
> If the problem were a specific current source, a discrete
> JFET might not even be on the table, anyway.  This is about
> understanding JFETs better, not building a real current sink.
> The current sink is a fencing foil for learning about how to
> read JFET datasheets and perhaps learn a little about the
> scattering of real JFETs that I might find, were I to look
> further than I have.
>
> Jon
Reply to
Tim Williams

Oops,

top row of page 3:

formatting link
show points of current stability, but at nonzero Vgs, which is kind of sucky. If you have the voltage overhead, you could use a source resistor to self-bias it to this point. Curiously, the two plots show this crossing at approximately the same point (3-5mA) for all Vgs(off) values given.

In the Vgs = 0 region, the tempco is negative, or.... I think they made a typo on the top-left plot: the Vgs(off) = -2V curves seem to be labeled in reverse order with respect to temperature! The other three series seem to be in the correct order at least... Anyway, negative tempco, and the percentagewise change should be fairly similar across transistors. Let's see... it's hard to tell here because the larger curves are cut off, you don't get to see the -55C intercept. It seems to have a lower tempco for lower Vgs(off)'s, though. That would make compensating a FET CCS + source follower (i.e., a zero-offset follower) somewhat inconvienient.

Tim

--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
Reply to
Tim Williams

Looking at it, now.

Bingo! That is what I'm also looking at, but here:

formatting link
Also, top row on what they call page 240 (4th PDF page.)

Yup, exactly.

:)

That was exactly what I was considering, and asking about.

Yes, for two different Vgs(off) style devices (they seem to come in selected families divided along these lines.) I see that closely shown there, one at about 4mA and the other at about 5mA. That's what I saw at 10mA on the above linked PDF.

Or useful, if you _wanted_ the ability to adjust the tempco from small negative to small positive values for some purpose at hand. This feature might be useful somewhere.

Jon

Reply to
Jon Kirwan

Just might have thought of one oddball place. The vbe-amplifier/multiplier device when used with a specific push-pull pair of output BJTs, needed to tweak in (at calibration time) a precision tempco. Might need either direction and there is some flexibility about the exact Id that can be used there to get it.

Jon

Reply to
Jon Kirwan

I think I have my answer on this narrow point and it is too obvious. Natually, the Rds will be lowest at Vgs=0 and the small signal variations around Vgs=0 will be set by that. Increasing that impedance line means getting Vgs as close to pinchoff, as useful, to boost Rds and flatten out it's response to changes in Vds. So my last question, which implies that the greatest slope might occur at a Vgs far away from Vgs(off), is meaningless. The best slope will always be towards smaller Id and nearer pinchoff. Yet the tempco=0 point will always be in the middle somewhere and not towards some extreme point. So I have my answer to that. The question itself implied that I'd forgotten something about the basic idea, which hopefully is corrected.

Jon

Reply to
Jon Kirwan

Ah, but the top row is 25C... did you mean the bottom right figure? THat shows the crossing at:...

Yeah, that thing.

Ah, true. Of course, the important quantity is tempco as percentage of current, since current varies too (and, notably, it's a constant ratio for all BJTs), and since it's slightly easier to make ratios of current (i.e. gain) than to add offsets as well (i.e. needs a current source).

Obviously, if you've got any operating point where the tempco *reverses*, no change in forward bias can reverse-reverse that.

As for compensating something like BJTs in a power amp, I'd be worried that

  1. it's not the same shape (polynomial vs. exponential over a wider temperature range?), so maybe you'll match it appropriately for a small range, but then it sucks at the ends of that range; 2. the actual "thermal gain" might end up relatively low anyway (especially around the null point), thus begetting the same problem you started with, i.e. needing to subtract the bias current to enhance the apparent tempco; and 3. the voltage offset could be quite large, much greater than most Vbe multipliers run at. This would have to be offset by selecting low-Vgs(off) JFETs, or inelegantly juggling the current through a couple mirrors to get a usefully low knee voltage.

Tim

--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
Reply to
Tim Williams

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