Hybrid capacitors

Well, if you use 0105 caps it is actually possible. I'm still in the

Jon

On a multilayer board, 10 caps per power plane is a lot. We use three or four bypass caps per FPGA per supply voltage, all the same value. That always works, so is probably too many.

Almost everything we do is 0402s, now. In fact, Murata doesn't want us using

I tend to use .1uF caps with a few at whatever capacitance is needed to have the SRF at the clock frequency. Of course there are larger bulk caps at the supplies and at really high current devices.

You aren't grasping the concept. He didn't build a board for some application and verify that it worked the way he designed it, he built a board just to test the functionality of decoupling caps in the analysis and simulation that he did. He primarily disproved the myth of the inductive loop of cap and power/ground pins being the determining factor in a system using adequate power/ground planes. Rather the power/ground planes couple the cap to the pins as a transmission line providing all the current the pins need until the wave front reaches the cap and the cap can supply the current. The size of and therefore the inductance of the loop is not directly relevant in this case.

That is the basis of the myth of needing a cap for each power pin. Once you dispel that myth you can then focus on the impedance of the PDS over frequency and optimize the number of caps for cost and board area vs impedance.

around.

So how do you ever know you have enough if you don't do an engineering analysis? Do you just keep adding caps until you can't lift the board anymore?

Rick

(1n-100n) ceramic and larger (say 100uF) tantalum/electrolyte capacitors.

manufacturability I was wondering whether there are

pattern in order to preserve the low inductivity.

devices, medical, etc.

I very much doubt it - as you say, ESL - equivalent series inductance - is pretty much determined by geometry and dimensions. What prompted you to ask the question?

There's also the persistent delusion that you sprinkle a few tantalums around your board to increase the by-pass capacitance - which they do, but that's not why they are useful. What they mainly do is add a bit of ESR to damp any inductor-capacitor resonances.

I once got embarrassed by such a resonance, when the inductor was a ferrite bead which wasn't quite as lossy as I'd hoped at the resonant frequency. A bodged-in parallel tantalum killed it, for more money than I cared to spend. A resistor in the right place did just as well, and was a lot cheaper, but it had to wait until we laid out the board again.

(1n-100n) ceramic and larger (say 100uF) tantalum/electrolyte capacitors.

manufacturability I was wondering whether there are

landing pattern in order to preserve the low inductivity.

devices, medical, etc.

Sometimes you need bulk capacitance, like for FPGAs and uPs that have big low-frequency components in their supply currents, like from burst operations of some sort.

No, you're not grasping the "existence theorem".

And fewer would almost surely have worked, as well.

Only for small values of capacitance and because the ground plane *is* a cap. That's something that JL has been saying here for some time.

around.

Good Lord, you lefties really are stupid.

Actually, it's a low-impedance transmission line. If you plop an SMA connector in the center of a power/ground plane pair, on a square board, and TDR it, it looks like a low impedance transmission line, an ohm or two, for a while until the TDR step hits the edges of the board and reflects back. After that, you get the exponential charging you'd expect from a capacitor.

What messifies this is that the SMA is located in the center of a square transmission line, not at all the way we usually look at things like this. The structure is also very lossy, and the edge reflections are fuzzy. As you start loading bypass caps here and there, the structure looks more and more like one ideal capacitor.

I just treat a plane as an ideal capacitor, and assume that adding bypass caps make it a higher-valued ideal cap. That works fine.

There must be, somewhere, an analysis of an infinite-sheet parallel-plate transmission line, as seen from one point on the plane.

This is all interesting but not very practical. On a multilayer board, almost any bypassing scheme works. No bypassing will usually work.

"John Larkin" wrote in message news: snipped-for-privacy@4ax.com...

Why not do it yourself? The equations are simple to set up.

I think you'll find it doesn't have a very well defined impedance, though. The reason is apparent when you run the numbers. Propagation is radial so the wave front width increases.

More interesting than viewing it as a transmission line (which would be an axially driven, cylindrical or coaxial resonator structure) is its inductance, which follows a similar law.

Tim