1. Home
  2. Electronics Design
  3. How to stabalise this discrete LDO cct.

How to stabalise this discrete LDO cct.

Hi to all. I've put together( well simulated :0) ) a discrete LDO cct using an opamp(lm358) and a p-channel mosfet. Under certain conditions it oscillates. How do I go about compensating this circuit so that it does not oscillate. I must stress I'm not going to actually build this circuit , I'm just playing around. If R9 (0.01) ohms is increaced to about 0.1 ohms or higher the circuit oscillates.Is it even possible to fix this , or is the circuit inherently unstable.As I aid I'm not going to build it ,I can buy a LDO :0) , I'm just playing around.The left part of the cct is just a constant current source feeding a zener for the voltage reference. The cct is in LTSpice format. LM358 model included.Just copy and put into -> file.asc

Cheers Rob

Version 4 SHEET 1 3536 1904 WIRE -112 -256 -208 -256 WIRE -64 -256 -112 -256 WIRE 160 -256 -64 -256 WIRE 288 -256 160 -256 WIRE 448 -256 384 -256 WIRE 528 -256 448 -256 WIRE 608 -256 528 -256 WIRE -208 -224 -208 -256 WIRE -112 -224 -112 -256 WIRE 448 -160 448 -256 WIRE -112 -128 -112 -144 WIRE 304 -128 304 -208 WIRE -208 -80 -208 -160 WIRE -176 -80 -208 -80 WIRE 128 -80 80 -80 WIRE 256 -80 208 -80 WIRE -208 -48 -208 -80 WIRE 608 -48 608 -256 WIRE 608 -16 608 -48 WIRE -464 0 -464 -48 WIRE 528 0 528 -256 WIRE 448 16 448 -80 WIRE 448 16 352 16 WIRE -208 48 -208 32 WIRE 160 48 160 -256 WIRE -112 64 -112 -32 WIRE -48 64 -112 64 WIRE 80 64 80 -80 WIRE 80 64 32 64 WIRE 128 64 80 64 WIRE 256 80 256 -80 WIRE 256 80 192 80 WIRE 304 80 304 -48 WIRE 304 80 256 80 WIRE 448 80 448 16 WIRE -464 96 -464 80 WIRE 128 96 32 96 WIRE -112 112 -112 64 WIRE -112 112 -208 112 WIRE -208 144 -208 112 WIRE -112 160 -112 112 WIRE 32 176 32 96 WIRE 352 176 352 16 WIRE 352 176 32 176 WIRE -208 288 -208 208 WIRE -112 288 -112 224 WIRE -112 288 -208 288 WIRE 160 288 160 112 WIRE 160 288 -112 288 WIRE 288 288 160 288 WIRE 448 288 448 160 WIRE 448 288 368 288 WIRE 528 288 528 64 WIRE 528 288 448 288 WIRE 608 288 608 64 WIRE 608 288 528 288 WIRE 160 304 160 288 FLAG 160 304 0 FLAG -464 96 0 FLAG -464 -48 SUPPLY FLAG -208 48 0 FLAG 608 -48 Load FLAG -64 -256 SUPPLY SYMBOL voltage -464 -16 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value SINE(14.2 2 2) SYMBOL res 224 -96 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R1 SYMATTR Value 220k SYMBOL res 48 48 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R2 SYMATTR Value 1k SYMBOL pmos 384 -208 M270 WINDOW 0 88 67 VLeft 0 WINDOW 3 120 69 VLeft 0 SYMATTR InstName M1 SYMATTR Value FDS4435A SYMBOL res 432 -176 R0 SYMATTR InstName R3 SYMATTR Value 20k SYMBOL res 432 64 R0 SYMATTR InstName R4 SYMATTR Value 10k SYMBOL res 592 -32 R0 SYMATTR InstName R6 SYMATTR Value 6 SYMBOL zener -96 224 R180 WINDOW 0 -24 74 Left 0 WINDOW 3 -72 0 Left 0 SYMATTR InstName D1 SYMATTR Value 1N750 SYMATTR Description Diode SYMATTR Type diode SYMBOL pnp -176 -32 M180 SYMATTR InstName Q1 SYMATTR Value 2N3906 SYMBOL zener -192 -160 R180 WINDOW 0 24 72 Left 0 WINDOW 3 24 0 Left 0 SYMATTR InstName D2 SYMATTR Value 1N750 SYMATTR Description Diode SYMATTR Type diode SYMBOL res -128 -240 R0 SYMATTR InstName R7 SYMATTR Value 390 SYMBOL res -224 -64 R0 SYMATTR InstName R8 SYMATTR Value 1k SYMBOL res 384 272 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R9 SYMATTR Value 0.01 SYMBOL cap 512 0 R0 SYMATTR InstName C1 SYMATTR Value 100=B5 SYMBOL cap -224 144 R0 SYMATTR InstName C2 SYMATTR Value 1=B5 SYMBOL Opamps\\opamp2 160 16 R0 SYMATTR InstName U1 SYMATTR Value lm358 SYMBOL res 288 -144 R0 SYMATTR InstName R10 SYMATTR Value 1k TEXT -162 328 Left 0 !.tran 1 TEXT 776 -856 Left 0 !

*//////////////////////////////////////////////////////////\n*LM358 DUAL OPERATIONAL AMPLIFIER MACRO-MODEL \n*//////////////////////////////////////////////////////////\n*\n* connections: non-inverting input\n* | inverting input\n* | | positive power supply \n* | | | negative power supply \n* | | | | output\n* | | | | |\n* | | | | |\n.SUBCKT LM358 1 2 99 50 28\n*\n*Features:\n*Eliminates need for dual supplies\n*Large DC voltage gain =3D 100dB\n*High bandwidth =3D 1MHz\n*Low input offset voltage =3D 2mV\n*Wide supply range =3D +-1.5V to +-16V\n* \n*NOTE: Model is for single device only and simulated\n* supply current is 1/2 of total device current.\n* Output crossover distortion with dual supplies\n* is not modeled.\n* \n****************INPUT STAGE**************\n*\nIOS 2 1 5N\n*^Input offset current\nR1 1 3 500K\nR2 3 2 500K\nI1 99 4 100U\nR3 5 50 517\nR4 6 50 517\nQ1 5 2 4 QX\nQ2 6 7 4 QX\n*Fp2=3D1.2 MHz\nC4 5 6 128.27P\n*\n***********COMMON MODE EFFECT***********\n*\nI2 99 50 75U \n*^Quiescent supply current\nEOS 7 1 POLY(1) 16 49 2E-3 1\n*Input offset voltage.^\nR8 99 49 60K\nR9 49 50 60K\n*\n*********OUTPUT VOLTAGE LIMITING********\nV2 99 8 1.63\nD1 9 8 DX\nD2 10 9 DX\nV3 10 50 .635\n*\n**************SECOND STAGE**************\n*\nEH 99 98 99 49 1\nG1 98 9 POLY(1) 5 6 0 9.8772E-4 0 .3459\n*Fp1=3D7.86 Hz\nR5 98 9 101.2433MEG\nC3 98 9 200P\n*\n***************POLE STAGE*************** \n*\n*Fp=3D2 MHz\nG3 98 15 9 49 1E-6\nR12 98 15 1MEG\nC5 98 15 7.9577E-14\n*\n*********COMMON-MODE ZERO STAGE*********\n*\n*Fpcm=3D10 KHz\nG4 98 16 3 49 5.6234E-8 \nL2 98 17 15.9M\nR13 17 16 1K\n*\n**************OUTPUT STAGE**************\n*\nF6 50 99 POLY(1) V6 300U 1\nE1 99 23 99 15 1\nR16 24 23 17.5\nD5 26 24 DX\nV6 26 22 .63V \nR17 23 25 17.5\nD6 25 27 DX\nV7 22 27 .63V\nV5 22 21 0.27V\nD4 21 15 DX\nV4 20 22 0.27V\nD3 15 20 DX\nL3 22 28 500P\nRL3 22 28 100K\n* \n***************MODELS USED**************\n*\n.MODEL DX D(IS=3D1E-15)\n.MODEL QX PNP(BF=3D1.111E3)\n*\n.ENDS
Reply to
neddie
Loading thread data ...

File's mangled, or at least my LTSpice couldn't read it.

Can you post an image somewhere, or a PDF?

Are you just feeding back voltage from the MOSFET drain, or are you feeding back from its gate? It can be really difficult to get stability with a common-source MOSFET circuit unless you have some sort of feedback around the device, as well as around the whole circuit.

--
Tim Wescott
Control system and signal processing consulting
www.wescottdesign.com
Reply to
Tim Wescott

On Jun 3, 6:12=A0pm, Tim Wescott wrote:

y

I'll try and post the 2 parts of the cct seperately.The cct and the lm358 model. I've made some progress. Adding a small cap (1n) across the feedback resistor to reduce the higher frequency gain has made this cct stable.I'd like to add a NPN transistor across R9 to act as a current limit cct. Emitter to gnd , base to other side of R9 and the collector to the net marked Vcl. The idea is that when the volt drop across R9 is large enough to turn on the transistor , it pulls the output voltage down. This is the origonal cct.(without any add-ons). This can be stabalised by adding a 1n cap across R11 , feedback resistor. If I add the current limiting cct however , I can't stabalise it. Version 4 SHEET 1 3536 2432 WIRE -112 -256 -208 -256 WIRE -64 -256 -112 -256 WIRE 288 -256 -64 -256 WIRE 448 -256 384 -256 WIRE 528 -256 448 -256 WIRE 608 -256 528 -256 WIRE -208 -224 -208 -256 WIRE -112 -224 -112 -256 WIRE 448 -160 448 -256 WIRE -112 -128 -112 -144 WIRE 304 -128 304 -208 WIRE -208 -80 -208 -160 WIRE -176 -80 -208 -80 WIRE 176 -64 80 -64 WIRE -208 -48 -208 -80 WIRE 608 -48 608 -256 WIRE 608 -16 608 -48 WIRE -464 0 -464 -48 WIRE 528 0 528 -256 WIRE 448 16 448 -80 WIRE 448 16 352 16 WIRE -208 48 -208 32 WIRE -112 64 -112 -32 WIRE -48 64 -112 64 WIRE 80 64 80 -64 WIRE 80 64 32 64 WIRE 128 64 80 64 WIRE 256 80 256 -64 WIRE 256 80 192 80 WIRE 304 80 304 -48 WIRE 304 80 256 80 WIRE 448 80 448 16 WIRE -464 96 -464 80 WIRE 128 96 32 96 WIRE -112 112 -112 64 WIRE -112 112 -208 112 WIRE -208 144 -208 112 WIRE -112 160 -112 112 WIRE 32 176 32 96 WIRE 352 176 352 16 WIRE 352 176 32 176 WIRE -208 288 -208 208 WIRE -112 288 -112 224 WIRE -112 288 -208 288 WIRE 160 288 160 112 WIRE 160 288 -112 288 WIRE 288 288 160 288 WIRE 448 288 448 160 WIRE 448 288 368 288 WIRE 528 288 528 64 WIRE 528 288 448 288 WIRE 608 288 608 64 WIRE 608 288 528 288 WIRE 160 304 160 288 FLAG 160 304 0 FLAG -464 96 0 FLAG -464 -48 SUPPLY FLAG -208 48 0 FLAG 608 -48 Load FLAG -64 -256 SUPPLY FLAG 80 64 Vcl FLAG 160 48 SUPPLY SYMBOL voltage -464 -16 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value SINE(14.2 2 2) SYMBOL res 48 48 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R2 SYMATTR Value 1k SYMBOL pmos 384 -208 M270 WINDOW 0 88 67 VLeft 0 WINDOW 3 120 69 VLeft 0 SYMATTR InstName M1 SYMATTR Value FDS4435A SYMBOL res 432 -176 R0 SYMATTR InstName R3 SYMATTR Value 20k SYMBOL res 432 64 R0 SYMATTR InstName R4 SYMATTR Value 10k SYMBOL res 592 -32 R0 SYMATTR InstName R6 SYMATTR Value 3 SYMBOL zener -96 224 R180 WINDOW 0 -24 74 Left 0 WINDOW 3 -72 0 Left 0 SYMATTR InstName D1 SYMATTR Value 1N750 SYMATTR Description Diode SYMATTR Type diode SYMBOL pnp -176 -32 M180 SYMATTR InstName Q1 SYMATTR Value 2N3906 SYMBOL zener -192 -160 R180 WINDOW 0 24 72 Left 0 WINDOW 3 24 0 Left 0 SYMATTR InstName D2 SYMATTR Value 1N750 SYMATTR Description Diode SYMATTR Type diode SYMBOL res -128 -240 R0 SYMATTR InstName R7 SYMATTR Value 390 SYMBOL res -224 -64 R0 SYMATTR InstName R8 SYMATTR Value 1k SYMBOL res 384 272 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R9 SYMATTR Value 0.1 SYMBOL cap 512 0 R0 SYMATTR InstName C1 SYMATTR Value 1000=B5 SYMBOL cap -224 144 R0 SYMATTR InstName C2 SYMATTR Value 1=B5 SYMBOL Opamps\\opamp2 160 16 R0 SYMATTR InstName U1 SYMATTR Value lm358 SYMBOL res 288 -144 R0 SYMATTR InstName R10 SYMATTR Value 1k SYMBOL res 272 -80 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R11 SYMATTR Value 220k TEXT -162 328 Left 0 !.tran 1 TEXT -504 192 Left 0 !;ac dec 1000 1 10meg

This is the LM358 model.

*////////////////////////////////////////////////////////// *LM358 DUAL OPERATIONAL AMPLIFIER MACRO-MODEL *////////////////////////////////////////////////////////// *
  • connections: non-inverting input
  • | inverting input
  • | | positive power supply
  • | | | negative power supply
  • | | | | output
  • | | | | |
  • | | | | |
.SUBCKT LM358 1 2 99 50 28 * *Features: *Eliminates need for dual supplies *Large DC voltage gain =3D 100dB *High bandwidth =3D 1MHz *Low input offset voltage =3D 2mV *Wide supply range =3D +-1.5V to +-16V * *NOTE: Model is for single device only and simulated
  • supply current is 1/2 of total device current.
  • Output crossover distortion with dual supplies
  • is not modeled.
* ****************INPUT STAGE**************
  • IOS 2 1 5N
*^Input offset current R1 1 3 500K R2 3 2 500K I1 99 4 100U R3 5 50 517 R4 6 50 517 Q1 5 2 4 QX Q2 6 7 4 QX *Fp2=3D1.2 MHz C4 5 6 128.27P * ***********COMMON MODE EFFECT***********
  • I2 99 50 75U
*^Quiescent supply current EOS 7 1 POLY(1) 16 49 2E-3 1 *Input offset voltage.^ R8 99 49 60K R9 49 50 60K * *********OUTPUT VOLTAGE LIMITING******** V2 99 8 1.63 D1 9 8 DX D2 10 9 DX V3 10 50 .635 * **************SECOND STAGE**************
  • EH 99 98 99 49 1 G1 98 9 POLY(1) 5 6 0 9.8772E-4 0 .3459
*Fp1=3D7.86 Hz R5 98 9 101.2433MEG C3 98 9 200P * ***************POLE STAGE*************** * *Fp=3D2 MHz G3 98 15 9 49 1E-6 R12 98 15 1MEG C5 98 15 7.9577E-14 * *********COMMON-MODE ZERO STAGE********* * *Fpcm=3D10 KHz G4 98 16 3 49 5.6234E-8 L2 98 17 15.9M R13 17 16 1K * **************OUTPUT STAGE**************
  • F6 50 99 POLY(1) V6 300U 1 E1 99 23 99 15 1 R16 24 23 17.5 D5 26 24 DX V6 26 22 .63V R17 23 25 17.5 D6 25 27 DX V7 22 27 .63V V5 22 21 0.27V D4 21 15 DX V4 20 22 0.27V D3 15 20 DX L3 22 28 500P RL3 22 28 100K
* ***************MODELS USED**************
  • .MODEL DX D(IS=3D1E-15) .MODEL QX PNP(BF=3D1.111E3)
  • .ENDS
Reply to
neddie

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.