"John Fields" a écrit dans le message de news: snipped-for-privacy@4ax.com...
You can have pretty good 50% duty cycle ratio with this:
VDD | | V k(1+cos(2x)) Schmitt Digital Multiplier | k cos(2x) trigger Electronic +-----+ | | +-----+ +-----+ sin(x) ---+--| | | || | | +-+-| clk | |--- Out1 | | X |-----||--+-------| | | |--+--| | +--| | || | |-+-+ | | | |--- Out2 +-----+ | +-----+ | +-----+ | | .-. .-. | | | | | | | | '-' '-' | || | +-----||---------+ | || | | /| | | /-|-------' '-----< | \+|- VDD/2 \|
(created by AACircuit v1.28 beta 10/06/04
The 50% duty cycle accuracy depends on the VDD to VDD/2 ratio accuracy. However, it'll still be worse than a divided clock, unless you go to considerable efforts.