How to quickly turn on/off N-FET switching high side of 55V?

Dec 12, 2007 141 Replies

Almost any kind of power relay will maintain its state for practical purposes at 50g, but the coil power will be a bit hefty compared to a MOSFET, not too much more, maybe 2x. You can save yourself a lot of circuit design by going with a P-channel, then the drive is a simple TTL-> HV current source-> V+ referenced MOSFET gate. Digikey has these in stock for $5.40:

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The mounting will be non-trivial.

All of that is just so ugly, I think I'm going to get sick...

Okay how about this, a traditional bootstrap augmented with a SCVM, simple capacitive voltage multiplier, activated by HV output, to sustain gate drive. The SCVM could be anything, cheapo logic schmitt self-oscillating or cheapo CVM IC or anything... View in a fixed-width font such as Courier.

. . . . . HV . | . .------+-|-|>|---| r |--------|| | . | v | | ||> | . | r | === | | . | | |Cbst | | . +----+ | | | . | '------+---------------+---> out . | | | | . | | ----- - . | | | | ^ . CMOS IN >---' | |SCVM | | . Dz -/ | | | . ^ ----- --- . | | pgnd . +-------' . | . [Rb] . | . --- . sgnd . .

Guess that should look more like this: View in a fixed-width font such as Courier.

. . . . . HV . | . .------+-|-|>|---| r |--------|| | . | v | | ||> | . | r | === | | . | | |Cbst | | . +----+ | | | . | '------+-----+---------+---> out . | | | | | . | | ----- - . | | | | ^ . CMOS IN >---' | |SCVM | | . Dz -/ | | | . ^ ----- --- . | | pgnd . +-------' . | . [Rb] . | . --- . sgnd . .

A bit more explicit: View in a fixed-width font such as Courier.

. . . . . HV . | . 12V>-|>|------+------+-| | . | r | === | | . | | |Cbst | | . +----+ | | | . | '------+-----+---------+---> out . | | | | | . | | ----- - . | | | | ^ . CMOS IN >---' | |SCVM | | . Dz -/ | | | . ^ ----- --- . | | pgnd . +-------' . | . [Rb] . | . --- . sgnd . .

I didn't answer this, sorry. You can estimate relative MOSFET dies sizes by comparing power dissipation ratings and gate capacitance Ciss.

The switching time of a cmos gate, typically under 10ns, is basically zero compared to the several 3 to 5us delay in the optoisolators, and the 10 to 15us time to charge the MOSFET gates. So one before the other has no impact. Generally one likes to draw a circuit including necessary driving pieces, etc., so as not to make excessive demands on the signa; source, etc. That's why an inverter would be customarily shown at the input to start things off.

Well, even so, are you thinking well about the bigger picture? I mean, is this just a bunch of batteries to gang up and help run a motor? What's wrong with just using a diode-OR on each battery? Is it necessary to isolate the OFF batteries? If so, then you'll need two MOSFETs back-back (source-to-source) to insure the ON battery doesn't work to charge the discharged ones. What about fuses, current-limiting, status indicators, etc. Does the motor have a PWM modulator or something, you don't just always give it the full juice, do you? What about current monitoring, etc.?

All that said, if your batteries are all tied together and share the ground system, there's a MUCH simpler approach that can be used. We can dispense with all the optically-isolated stuff. Like I said, generally it's more fun on usenet s.e.d. to talk about whatever interests us most at the time, as conversation goes, rather than what may actually be best for a project.

Took me 2.5 hours to get home! But my Prius was an ideal car for the task - it's great at stop and go traffic - the gas engine shuts down so you can inch forward on batteries. I can get up to 35mph before the gas engine kicks in, if I'm accelerating slowly. (And if the battery is well charged, and if the heater is off, and if it's not so cold the software insists on protecting the battery. That's a lot of ifs.)

What's SCVM?

I think the "Cbst" capacitor power idea was covered, "Cbst" would have to hold enough charge to run the "drvr" for half an hour or more. Maybe if "drvr" is a micropower circuit, and if "Cbst" is big enough.

Wouldn't power dissipation ratings also be highly dependent on the package that the FET was in?

Ah - that makes perfect sense.

So this board is a power distribution board. It carries power to a number of other boards that run various motors through all sorts of current loops. It also powers some digital systems that take in the high voltage and step it down to something more usable.

The reason I want be able to switch on and off the power sources is that I want to be able to protect them from undervoltage and overcurrent situations. They are li-polys, so if I drain them too much or if I pull too much current they die. If I just used diodes I would lose that protection. I also want it high side switched as we have had problems due to low side switching - with fun ground loop problems like through external VGA cables and stuff like that. Also, the hope was that using FETs would give me a bit more efficiency, though I suppose that is not a huge gain. Note that there will be 3 power sources - two batteries and wall power. The wall power input does not need undervoltage protection, obviously (except for it being too low to power anything - at about 9VDC).

I don't understand why I would need two mosfets, or even how that would work... I mean once the FET is off (VGS < VT)current can't flow through it, or at least that was my understanding. Errr wait - intrnisic body diode... Argh. It has a 1.3V forward voltage according to the IRF1407PbF datasheet. I see your point now. What happens to a FET when it is reverse biased? It looks like the body diode turns on at about -1.3V and then can handle a ton of current, but what about between VDS = -1.3V - 0? I'm assuming it's just off. That's not really relevant, but now I'm really curious as I've never really heard the properties of N-FETs discussed with regards to VDS < 0. But why put two FETs source to source? To me it'd make more sense to put a schottky diode in series with the FET. I'd probably put it on the drain side of the FET just so as to increase VGS a little. I mean - if you put two FETs source to source wouldn't you see a 1.3V drop across one of them?

As for current limiting and indicators and whatnot - I am planning on putting a 5V buck converter that powers all the logic switching these FETs, as well as a high side shunt resistor with a high side current sense amplifier. A comparator will watch the output of the high side current sense amplifier and drive an OR gate that is driving the FET driver. I haven't figured out what all indicators are needed - but that is planned. Probably one to show if a battery has been turned off for undervoltage, and another to indicate which power source is being used. Maybe a couple latched LEDs to show if there were any transient problems (ie a surge in current).

The batteries all share a common ground. What simpler system were you thinking of? I would really like to keep it high side switched, if that was your idea.

Ah - I did better than you! Took me a mere 1:45 to get home (typically ~25 minutes). I heard that the highways were completely backed up so I went back roads the entire way, and it worked out fairly well. It was clear sailing from Watertown to Cambridge - almost no cars on the road whatsoever.

The general concept is path splitting, using separate, paralleled gain stages for the DC and AC parts of the signal. We're working on a laser driver, dc to 15 GHz, that uses split paths. The tricky part here is the final combining circuit, and getting the step response really flat in the crossover region. We may just digitize the dc component, run it through a fir filter, and dac it into the combiner; then all we'll need is a tuning algorithm, which might finally be a use for my deconvolution program, which was originally designed to beautify the step response of a fast-but-ugly TDR.

John

I only drew 2 inverters to enforce solid drive to both led's. If the incoming logic level is known to be sufficiently stiff, a single inverter will do.

Except that, as drawn, it just doesn't work any more.

There's no need to consider delays in the led drive; the phototransistors are orders of magnitude slower than the gate delays driving the led's.

John

Oops - all the snow went straight to my head. :o Resistor should be on other side of B optoisolator.

I had it in my head that phototransistors were fairly slow, hence the confusion. Thanks for clearing it up!

-Michael

SCVM is a multiplier used to maintain the gate charge in the big one. Everything is the same. A simplified drawing assuming minimum HV at 10V or more would be as shown: View in a fixed-width font such as Courier.

. . HV . | . 12V>--+-|>|-+--------+-----+-| | . | '----+--B pnp | | | . [1K] | C === | | . | | | |Cbst | | . | | '-----+------+---------------+---> out . | | | | | | . | |- | +-|>|-----+ - . +-------|| SSN1N45BTA| | | ^ . | |> | | [100] | . \\| | | | | | . 2N7000 ||-------+ -/ | === --- .

I'm not impressed with those numbers or your techniques...very boring stuff.

This stuff keeps me amused, and paid.

What amuses you?

John

No. At least not very much. You'll find that dies mounted in TO-220 packages have the same thermal resistance as the same dies mounted in a much larger TO-247 package. And as the smaller D2-PAK package. It's the die's area footprint that matters.

They conduct current either way if the gate voltage is high enough over the source. If the reverse-direction current is high enough the drop across Rds(on) will increase to the point where the anti-parallel intrinsic diode also conducts.

To make a fully-bidirectional four-quadrant switch, that is completely OFF in one state and completely ON in the other.

When the FETs are both ON you get 2*Rds(on), not 1.3 volts.

You may be better off with a diode - assuming you want to switch from one source to the other without a power break, you'll need a diode-OR action. An ON/OFF two-MOSFET switch could conduct huge currents from a high-voltage battery into a low one.

Before leaving the topic, it's worth noting that MOSFETs as active rectifiers are better and cheaper than Schottky diodes. For example, a 60CTQ045 dual 45V Schottky will drop about 500mV at 30A, whereas an IRF1405 55V MOSFET will drop only 210mV at 30A (both warmed up to Tj = 100C). The diode costs $2.78 qty 100, vs $2.64 for the MOSFET.

I'll answer later. Meanwhile look at Fred's ASCII drawing, as a start. I'd change a few things, but the basic idea is to use a capacitor to deliver the MOSFET operating voltages, and transistor level-shift and driver stages.

Here\'s my second cut for the 55V 30A high side driver: Version 4 SHEET 1 1852 1156 WIRE 800 400 576 400 WIRE 912 400 800 400 WIRE 1168 400 912 400 WIRE 1504 400 1168 400 WIRE 576 480 576 400 WIRE 800 480 800 400 WIRE 912 480 912 400 WIRE 1168 480 1168 400 WIRE 1504 480 1504 400 WIRE 1328 528 1280 528 WIRE 1440 528 1408 528 WIRE 800 624 800 544 WIRE 912 624 912 544 WIRE 912 624 800 624 WIRE 1648 624 912 624 WIRE 576 640 576 544 WIRE 656 640 576 640 WIRE 800 640 800 624 WIRE 800 640 736 640 WIRE 1504 656 1504 576 WIRE 576 704 576 640 WIRE 1648 704 1648 624 WIRE 208 736 96 736 WIRE 368 752 272 752 WIRE 400 752 368 752 WIRE 512 752 480 752 WIRE 1168 784 1168 560 WIRE 1280 784 1280 528 WIRE 1280 784 1168 784 WIRE 1504 784 1504 736 WIRE 1600 784 1504 784 WIRE 96 816 96 736 WIRE 128 816 96 816 WIRE 240 816 192 816 WIRE 368 816 368 752 WIRE 368 816 320 816 WIRE 1168 848 1168 784 WIRE 1504 848 1504 784 WIRE 1648 880 1648 800 WIRE 800 896 800 640 WIRE 800 896 672 896 WIRE 992 896 928 896 WIRE 1104 896 1072 896 WIRE 1280 896 1280 784 WIRE 1328 896 1280 896 WIRE 1440 896 1408 896 WIRE 96 928 96 816 WIRE 128 928 96 928 WIRE 240 928 192 928 WIRE 368 928 368 816 WIRE 368 928 320 928 WIRE 672 944 672 896 WIRE 800 944 800 896 WIRE 928 944 928 896 WIRE 96 960 96 928 WIRE 96 1056 96 1024 WIRE 576 1056 576 800 WIRE 576 1056 96 1056 WIRE 672 1056 672 1024 WIRE 672 1056 576 1056 WIRE 800 1056 800 1024 WIRE 800 1056 672 1056 WIRE 928 1056 928 1024 WIRE 928 1056 800 1056 WIRE 1168 1056 1168 944 WIRE 1168 1056 928 1056 WIRE 1504 1056 1504 944 WIRE 1504 1056 1168 1056 WIRE 1648 1056 1648 960 WIRE 1648 1056 1504 1056 WIRE 96 1104 96 1056 FLAG 96 1104 0 SYMBOL pnp 1440 576 M180 WINDOW 0 75 83 Left 0 WINDOW 3 53 48 Left 0 SYMATTR InstName Q1 SYMATTR Value 2N5401 SYMBOL npn 1104 848 R0 WINDOW 0 71 15 Left 0 WINDOW 3 45 48 Left 0 SYMATTR InstName Q2 SYMATTR Value 2N5550 SYMBOL voltage 800 928 R0 WINDOW 3 40 81 Left 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 WINDOW 0 40 53 Left 0 SYMATTR Value 55 SYMATTR InstName V2 SYMBOL res 1632 864 R0 WINDOW 0 -39 37 Left 0 WINDOW 3 -41 68 Left 0 SYMATTR InstName R4 SYMATTR Value 1.8 SYMBOL voltage 928 928 R0 WINDOW 3 24 104 Invisible 0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 WINDOW 0 39 57 Left 0 SYMATTR Value PULSE(0 5 0.02 1e-6 1e-6 0.05 0.1 1) SYMATTR InstName V3 SYMBOL res 1088 880 R90 WINDOW 0 -46 56 VBottom 0 WINDOW 3 -38 58 VTop 0 SYMATTR InstName R9 SYMATTR Value 1000 SYMBOL nmos 1600 704 R0 SYMATTR InstName M2 SYMATTR Value SUM75N06-09L SYMBOL res 1152 464 R0 SYMATTR InstName R2 SYMATTR Value 10k SYMBOL res 1424 512 R90 WINDOW 0 -46 56 VBottom 0 WINDOW 3 -38 58 VTop 0 SYMATTR InstName R1 SYMATTR Value 50k SYMBOL npn 1440 848 R0 WINDOW 0 72 17 Left 0 WINDOW 3 47 50 Left 0 SYMATTR InstName Q3 SYMATTR Value 2N5550 SYMBOL res 1424 880 R90 WINDOW 0 65 58 VBottom 0 WINDOW 3 73 54 VTop 0 SYMATTR InstName R3 SYMATTR Value 50k SYMBOL res 1488 640 R0 WINDOW 0 41 43 Left 0 WINDOW 3 34 74 Left 0 SYMATTR InstName R5 SYMATTR Value 1000 SYMBOL ind 640 656 R270 WINDOW 0 45 56 VTop 0 WINDOW 3 -8 54 VBottom 0 SYMATTR InstName L1 SYMATTR Value .005 SYMBOL npn 512 704 R0 SYMATTR InstName Q4 SYMATTR Value 2N5550 SYMBOL res 496 736 R90 WINDOW 0 -11 55 VBottom 0 WINDOW 3 35 55 VTop 0 SYMATTR InstName R6 SYMATTR Value 1000 SYMBOL diode 592 544 R180 WINDOW 0 51 34 Left 0 WINDOW 3 24 0 Left 0 SYMATTR InstName D1 SYMATTR Value MURS120 SYMBOL zener 816 544 R180 WINDOW 0 63 33 Left 0 WINDOW 3 24 0 Left 0 SYMATTR InstName D2 SYMATTR Value BZX84C10L SYMBOL cap 896 480 R0 WINDOW 0 48 32 Left 0 WINDOW 3 28 61 Left 0 SYMATTR InstName C1 SYMATTR Value 10e-6 SYMBOL Digital\\\\schmitt 208 672 R0 SYMATTR InstName A1 SYMATTR SpiceLine vhigh 5 vh 1 trise 10e-9 tfall 10e-9 SYMBOL cap 80 960 R0 WINDOW 0 -44 33 Left 0 WINDOW 3 -51 64 Left 0 SYMATTR InstName C3 SYMATTR Value 1e-8 SYMBOL res 336 800 R90 WINDOW 0 -6 58 VBottom 0 WINDOW 3 36 57 VTop 0 SYMATTR InstName R11 SYMATTR Value 910 SYMBOL diode 192 800 R90 WINDOW 0 0 32 VBottom 0 WINDOW 3 32 32 VTop 0 SYMATTR InstName D5 SYMATTR Value 1N4148 SYMBOL diode 128 944 R270 WINDOW 0 32 32 VTop 0 WINDOW 3 0 32 VBottom 0 SYMATTR InstName D6 SYMATTR Value 1N4148 SYMBOL res 336 912 R90 WINDOW 0 -11 56 VBottom 0 WINDOW 3 40 59 VTop 0 SYMATTR InstName R12 SYMATTR Value 8200 SYMBOL res 656 928 R0 WINDOW 0 -36 35 Left 0 WINDOW 3 -57 65 Left 0 SYMATTR InstName R7 SYMATTR Value 5600 TEXT 1672 920 Left 0 ;LOAD TEXT 104 1072 Left 0 !.tran .1

Note, 0.5V at 30A for a 60CTQ045 dual Schottky is 15W of heat that has to be dissipated, not a pretty sight! Two 60CTQ045 (all four sections in parallel) lowers the voltage drop to about 0.3V at moderate Tj, and lowers the power dissipation to 9 watts total, and to 4.5W in each of the TO-220 packages, which is much more sensible.

I'm not sure how useful it is to post Spice analysis files, it tends to stop or slow down the conversation, because one can't quickly read it on the spot.

WRT your circuit, John. Whew! A 65-volt gate swing! That's bold, and assumes the MOSFET's source will follow fast enough to keep Vgs below the 20-volt limit. Well, maybe, but I'd at least want a protective gate zener.

I liked Fred's circuit better, but the current sink + zener scheme as part of the flying gate-voltage generator bothered me.

Also, neither circuit addresses Michael's issues, which involves connecting two batteries and a third power source, to the 30A output power bus. The sad power-dissipating 30A diode-OR issue and its wiring, etc., is still unsettled.

--- I like ASCII as much as anyone, but when stuff starts getting complex to the point where timing is an issue or an ASCII drawing would just be too busy, I prefer to either run a simulation and post the schematic list or post a PDF to abse. In any case, how much bother could it be, if one is interested, to post the thing into LTSPICE and print out the schematic?

---

--- LOL, it's an N channel enhancement mode MOSFET high side driver switching a 55 volt source into a grounded load!

How else would you propose to do it?

---

--- Easy enough to do. My intent with the "second cut" wasn't to present a fully fleshed out circuit, but rather to illustrate a way to use a boost converter to generate the regulated gate drive voltage and have it ride on the positive supply voltage as it (the supply voltage) varied.

BTW, did you notice how the current used to drive the Zener and establish the gate drive voltage is returned to the battery instead of being wasted? Kinda slick, I thought...

---

--- Oh, well...

---

--- IMO, gett "The batteries all share a comm "I'll answer later."

I thought you were going to take that one on. No?

-- JF

Sorry, but it probably limits the conversation to a few -- you, me, anybody else? And look at the delay. You may not have had any answer at all.

No Sir. Check out the rail-rail current of your pnp and npn pullup and pulldown transistors, ughh!

The driver's currents should be referenced to the MOSFET's source. That's where the capacitance is.

In the noise level, compared to the mayhem underway.

Well, Win, the design was for the OP so I'd expect that he, at least, would be willing to accept a format that was convenient for me to work in and to provide a working model of the circuit. Whether it's inconvenient for you is really immaterial. Play my way if you want to, else why don't you ASCII-ize the drawing for everyone else who you think wants to play your way?

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