One quite straightforward way would be to divide down the 40MHz to something like 1-2Hz, then count the period with a 1-2 GHz reference clock, then invert the period digitally to give frequency.
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Another algorithm is to count the number of edges in the gate period, timestamp the first and last edges, then do the math. Timestamping can be done a number of ways, to tens of ps resolution.
My tach modules pretty much work that way, but they timestamp by just snapshotting a 40 MHz master counter, which is plenty good for tachs.
Yes, it is something like that (time stamping). I think there was an article in the old HP Journal that described it. ISTR precision analog ramps to "expand" the time interval between external edge and internal reference edge.
There are two clocks, one at (for instance) 10 MHz, that runs all the time, and the other at 10.01 MHz that can be started in a known phase. So, they start the 10.01 MHz clock at the first pulse of X input, and time with the 10 MHz clock while using a phase comparator between 10 MHz and 10.01 MHz. The first 'beat' of the two clocks will happen within a few (10) milliseconds, and the number of ticks from start to beat tells the number of (in this case) 100 ps sub-ticks between the first X pulse and the 10 MHz master clock's phase.
Then they do the same thing at the end of the gate time (it only takes milliseconds, so it doesn't add much to the gate time). It's a kind of vernier scale measurement...
There's a HP patent on it, circa 1975, that makes interesting reading.
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