Grok Electronics

Digital circuits have been described (specified and designed) with an HDL language for many years. But analogue designed have also adopted this approach, typically with Verilog-A. In the last integrated design I was involved in the blocks I had to implement were specified in Verilog-A, along with an associated test bench harness. These were the only things accessible to me in the design repository. I had no idea (although I could guess) what the complete IC was supposed to do. The customer took care to ensure that blocks allocated to a particular engineer were not adjacent to one another.

The days of one fellow drawing up a circuit for a small ASIC are not exactly over (still plenty of small commodity IC's out there) but for the larger designs HDL as a specification of a system and its subcomponents is the way to go. Synthesis of analogue circuitry from an HDL still isn't on the horizon as far as I'm aware, although this is an area in which AI may prove to be beneficial.

Thanks. Very interesting. I've used VHDL and Verilog but only for digital systems. What should I read if I want to find out about Verilog-A?

Your simulator docs.

Reference manual

That's what I do: draw schematics.

I'd have a hard time visualizing a circuit from a 900 line text netlist.

...

Ok. Thanks.

Changing one word confuses it a little less.

The digits of a three-digit number add up to 9. When you exchange the hundreds digit with the tens digit, the number increases by 90. When you exchange the tens digit with the units digit, the number decreases by 18. What is the number?

Except for the initial claim of 315

I sometimes (as in, right now) design a system as a Spice model and turn it over to an FPGA coder to implement digitally. Sometimes that just works, but more often (as in, right now) they have difficulty implementing the control loops and filtering and such, and scaling my analog parameters into the FPGA data formats. I have to go in and whiteboard the logic, down to the last decimal point.

It seems to me that software seldom includes a big-picture overview. All my schematics have sheet 1 as the block diagram and sheet index/table of contents.

Add we keep a separate folder of design notes.

Put three chopsticks into one bottle and mix rum+cokes with the other two.

Not surprising. I mentioned in a related post that Grok had issues counting up to 10! For example, when I used 'him' to help me complete the New Scientist crossword, I asked him this clue: "Largest citrus fruit (6)"? and he gave the correct answer (pomelo) right away - but then promptly dismissed it for being too long: "but it can't be pomelo as that has 7 letters and you need a 6 letter answer." A very similar thing happened with another clue, the answer to which was Dakota. He got it straight away but said it couldn't be right as it had too few letters. "How many letters has it got?" I asked. "9" came the reply. It really is utterly bizarre some of the answers he provides; getting the simplest things wrong. But then in the same session he'll tackle something highly complex and won't put a foot wrong. :-/

That looks like a really useful resource. Thanks, Joe!

No point; I'd just get the same response as you. The thing is, we all

I think you'll find it's not a problem with my description because the first thing Grok outputs is:

Power supply: The op-amp is powered by ±15V rails, so the output voltage must lie within this range (i.e., -15V ? V_out ? +15V) for an ideal op-amp. Non-inverting input: Grounded, so V_+ = 0V. Inverting input: Connected to a 20k? resistor (R4) to the output and a 10k? resistor (R3) to a node we'll call V_x. Node V_x: This is the junction of R3, R1, and R2. Resistors R1 (20k?) and R2 (20k?) form a voltage divider between a +12V source and ground.

Since this is an ideal op-amp, we assume:

The inputs draw no current (infinite input impedance). The voltage difference between the inverting and non-inverting inputs is zero (V_+ = V_-). [/Grok output]

This says it understands the question. It then proceeds to Step 2 where it makes a mistake I've seen humans make when asked to solve this problem.

I've read it, and I did like it. It's not any kind of great novel, but it is good.

So what. Ian M. Banks is great on vision. Ken MacLeod isn't short of it, but he's more interested in people. Science fiction is supposed to be about vision, but it's mostly satirical exaggerations of the authors own society.

Okay, accepted. In that case it's just another of its current shortcomings which will no doubt be ironed out as time goes on. And there will no doubt be backward steps along with upward revisions, too. Having been using Grok for some time now I have come to the view that you need to think of 'him' as a knowledgeable chum; no more than an informed buddy at your side who's as infallible as everyone else. You can't simply accept his assertions at face value; you need to verify them. But I believe two heads are better than one when it comes to trouble-shooting/fault-finding - even if one of those heads is not human!

On 14/09/2025 2:24 am, john larkin wrote:

John Larkins opinion on the subject have to be taken with a pinch of salt. Last year he wanted a fast monostable and I gave him a traditional circuit - the emitter-coupled monostable

Version 4 SHEET 1 3104 1040 WIRE -592 -720 -768 -720 WIRE 128 -720 -592 -720 WIRE 304 -720 128 -720 WIRE 768 -720 304 -720 WIRE 976 -720 768 -720 WIRE 1488 -576 1488 -720 WIRE 128 -560 128 -720 WIRE 304 -560 304 -720 WIRE 768 -560 768 -720 WIRE -592 -384 -592 -720 WIRE 1072 -368 1072 -400 WIRE 768 -320 768 -480 WIRE 960 -320 768 -320 WIRE 1008 -320 960 -320 WIRE 128 -288 128 -480 WIRE 176 -288 128 -288 WIRE 576 -288 240 -288 WIRE 768 -208 768 -320 WIRE 304 -160 304 -480 WIRE 400 -160 304 -160 WIRE 576 -160 576 -288 WIRE 576 -160 480 -160 WIRE 640 -160 576 -160 WIRE 704 -160 640 -160 WIRE -768 -64 -768 -720 WIRE 128 48 128 -288 WIRE -272 96 -432 96 WIRE 64 96 -192 96 WIRE 640 128 640 -160 WIRE 304 160 304 -160 WIRE -432 240 -432 96 WIRE -768 416 -768 16 WIRE -768 416 -880 416 WIRE -736 416 -768 416 WIRE -592 416 -592 -320 WIRE -592 416 -736 416 WIRE -496 416 -592 416 WIRE -432 416 -432 320 WIRE -432 416 -496 416 WIRE 640 416 640 208 WIRE 640 416 -432 416 WIRE 1072 416 640 416 WIRE 128 464 128 144 WIRE 768 464 768 -112 WIRE 768 464 128 464 WIRE -880 496 -880 416 WIRE 768 496 768 464 WIRE -736 640 -736 416 WIRE -496 640 -496 416 WIRE -736 656 -736 640 WIRE -736 944 -736 720 WIRE -496 944 -496 704 WIRE -496 944 -736 944 WIRE 304 944 304 240 WIRE 304 944 -496 944 WIRE 768 944 768 576 WIRE 768 944 304 944 WIRE 1760 944 768 944 FLAG -880 496 0 FLAG 960 -320 out SYMBOL npn 64 48 R0 SYMATTR InstName Q1 SYMATTR Value BFR92A SYMBOL npn 704 -208 R0 SYMATTR InstName Q2 SYMATTR Value BFR92A SYMBOL voltage -768 -80 R0 WINDOW 123 0 0 Left 2 WINDOW 39 24 44 Left 2 SYMATTR SpiceLine Rser=0.1 SYMATTR InstName V1 SYMATTR Value 5.0 SYMBOL voltage -736 624 R0 WINDOW 123 0 0 Left 2 WINDOW 39 24 44 Left 2 SYMATTR SpiceLine Rser=0.1 SYMATTR InstName V2 SYMATTR Value 4.5 SYMBOL voltage -432 224 R0 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V3 SYMATTR Value PULSE(0 0.2 1n 1n 1n 100p 500n 2) SYMBOL res -176 80 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R1 SYMATTR Value 22 SYMBOL res 752 480 R0 SYMATTR InstName R3 SYMATTR Value 360 SYMBOL res 112 -576 R0 SYMATTR InstName R4 SYMATTR Value 180 SYMBOL res 624 112 R0 SYMATTR InstName R5 SYMATTR Value 43 SYMBOL res 752 -576 R0 SYMATTR InstName R6 SYMATTR Value 180 SYMBOL res 288 -576 R0 SYMATTR InstName R2 SYMATTR Value 1k SYMBOL cap 240 -304 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C1 SYMATTR Value 3.3p SYMBOL res 288 144 R0 SYMATTR InstName R7 SYMATTR Value 1k5 SYMBOL res 496 -176 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R13 SYMATTR Value 43 SYMBOL cap -608 -384 R0 SYMATTR InstName C3 SYMATTR Value 10n SYMBOL cap -512 640 R0 SYMATTR InstName C4 SYMATTR Value 10n TEXT -272 1000 Left 2 !.model BFR92A NPN(IS=0.1213E-15 VAF=30 BF=94.73 IKF=0.46227 XTB=0 BR=10.729 CJC=946.47E-15 CJE=10.416E-15 TR=1.2744E-9 TF=26.796E-12 ITF=0.0044601 VTF=0.32861 XTF=0.3817 RB=14.998 RC=0.13793 RE=0.29088 Vceo=15 Icrating=4m mfg=Infineon) TEXT -904 1024 Left 2 !.tran 0 1u 0

He told me it wasn't a monostable, but a fast gain of ten amplifier. You have to give it a very slowly rising and falling pulse to get it to behave like that (as I did in the 18th July 2024) but if you give it a fast enough pulse to pull 5mA through C1 it give you a 1.5nsec wide pulse which swings from +3.2V to 5V. Pulling C1 down from 3.3pF to 1.8pF doesn't make it much narrower (down to 1.4nsec - you'd have to poke around inside the transistors to get a grip pf what actually goes on.

Providing a circuit description which could get around his mental block proved to be beyond me.

While this electronics example is interesting. In the software world, where rigour is very often absent, AI is being used to write software. Now that really is scary.

Amen to that!

Jim, not a fan of the humans fauning over AI

If you pay google, they will intercept peoples' searches and show your ads first. That becomes a bidding war.

Evil.

John Larkin Highland Tech Glen Canyon Design Center Lunatic Fringe Electronics