Ethernet module with just 2 layers

Thanks Andrew, the links you gave me implements ethernet with a FPGA.

How about using an ethernet PHY transceiver such as Micrel's KS8721B using only a double layer PCB?

Drawing from your other post, we know this is a project to connect two Ethernet PHY modules together...

Yes, this can be done in 2 layers.

I recommend using a PCB house, not do-it-yourself. If you are a student,

will waive the minimum quantity; their turnaround is fast, quality is top-notch, and the cost is reasonable. It's well worth spending the time to learn the CAD package. (I recommend the free version of Eagle at Plan on 2 board spins before you get a working proto (due to your layout trial-and-error, not the manufacturing process).

• The most sensitive sections of the layout will be the analog portion of the 10/100 output.

• Keep the differential RX and TX signal pairs short, routed together, and the same length.

• Add 0.01uF bypass caps between Vcc and Vss at every Vcc pin on the PHY modules.

• Use a copper pour for ground and Vcc The copper pour and overload of bypass caps are more overkill instead of best practice, but it'll avoid power supply problems on your proto.

Find out the magnetics ratio for the 10/100 PHY you're using and get an RJ-45 jack with integrated magnetics for simplicity. EDTP sells one version matched to the PHYs in the chips they sell.

Richard

I'm so glad to hear it's possible. I've seen so many that said it requires 4 layers and above.

I'm from Malaysia, so to make the PCB overseas is not possible. Our labs provide such service, however the output quality often times depends very much on the lab assistant's mood.

I've heard alot of nice things about Eagle. I've previously used the CircuitMaker 2000 so i'll stick with that just to save time, so that i need not familiarize with another program.

I've been reading articles on EMI, so i'll try to sum up what i read and route the traces the best i can.

Since there'll only be 2 layers, i believe the traces will be on the top and the ground and power traces will share the bottom? If so what should be the guideline of routing power and ground? Digital and analog will have to share the same ground correct?

I think i'll draw 1 up as soon as possible (drowning in assignments, exams etc) and if it's not to much hassle, could you review it for me?

I'm so glad to hear it's possible. I've seen so many that said it requires 4 layers and above.

I don't live in the US, so to make the PCB overseas is not possible. Our labs provide such service, however the output quality often times depends very much on the lab assistant's mood.

I've heard alot of nice things about Eagle. I've previously used the CircuitMaker 2000 so i'll stick with that just to save time, so that i need not familiarize with another program.

I've been reading articles on EMI, so i'll try to sum up what i read and route the traces the best i can.

Since there'll only be 2 layers, i believe the traces will be on the top and the ground and power traces will share the bottom? If so what should be the guideline of routing power and ground? Digital and analog will have to share the same ground correct?

I think i'll draw 1 up as soon as possible (drowning in assignments, exams etc) and if it's not to much hassle, could you review it for me?

4-layer is probably required for the PCI interface side of most newer PCI-based Ethernet controllers.

I managed to get an MCU with ASIX working in 2 layers. It took a couple board spins due to inexperience, but it can be done. (The digital side worked first round, but the analog PHY did not.) Without the benefit of dedicated power and ground planes, I flooded the top layer with Vss and bottom with Vss. Then, none of the Vcc pins were tied together - they were separately routed (adjacent via) to Vcc with dedicated bypass caps. The number of caps was probably overkill, but it worked.

I'd think you could easily find a cheap board house there. They manufacture there for way less than the US; the challenge is just getting good pricing for Qty1. Futurlec.com in Australia front-ends a board house in Thailand that could cost USD$45 for a small board, Qty1, if that's any easier. (Only $20 if you skip the solder mask, but I wouldn't recommend it.)

If you have / know a program, use it. That'll save tons of time.

I think the preferred practice is separate planes for analog and digital (or separate areas of the PCB), with single tie points between digital and analog, but mixed-signal is not my background. Regardless, with

2-layer you're going to be pretty constrained.

You can make it work with generous bypass caps on the Vcc pins. I had success by routing most "vertical" traces on the top layer, and "horizontal" traces on the bottom. This yields fairly contiguous power and ground floods around the traces.

I can offer comments, but my experience is more practical hacking than classroom. You should be able to find plenty of better examples, including a cheap Ethernet board (commonly ~$10).

HTH, Richard

About the bypass/decoupling capacitors. I'm not very sure how to use them.

The only way i know of to use it is to place them between the Vcc and GND pins of the IC.

Basic question.

How do i solder the decoupling capacitors?

If the cap is to be placed between the VCC pins (whose trace is at the top layer) and the GND (which is at the bottom layer), how do i solder the 2 pins of the cap?

Is there a website or tutorial/guide which introduces or teaches techniques like this?

PCI requires four layers. The controllers (at least the ones I've looked at) can be wired out in two though.

--
  Keith

D'oh!

Make that ... I flooded the top layer with Vss (ground) and bottom with Vcc.

You'll need plated-through-hole via's, which is why I recommended a professional board house. Ideally, you want the caps next to the Vcc pins on the same layer, the a trace from the cap to a via to reach Vcc. I managed to make it work directly beneath the Vcc pins through a via; not desirable because of the inductance added by the via, but deemed necessary.

Here's a good explanation for starters:

Dave specifically describes how the layout should look. He has several other good pages to browse when you have time.

If you haven't already discovered, at even moderate frequencies the physical layout of the board starts to become as critical as the schematic design.

As for sizing the caps, it's commonly referenced against frequency, but I understand the "frequency" is really more about the rise-time of the switching. I.e., if the rise time is one-half microsecond, it could cycle as fast as 1MHz; so, whether you're driving the output at 1MHz or

1KHz, the rise time is the same, and power is being drawn (and needs to be supplied) at a fast rate when the switching occurs.

Cheers, Richard

Thanks Richard for your advice, i'll definitely acknowledge you and other kind souls in this newsgroup for your help in my report.

I'll work on the PCB and feedback to you all the results.

There's another couple problem i wonder if you could help me, based on your experience with MII.

1)Upon request, Belfuse gave me a flimsy 14 page only datasheet for their powerline module

This datasheet gives only the pinouts of the module, nothing more. Thus, i'm having problems trying to figure out to connect which to which to my ethernet PHY. So, i was hoping if you could help me abit?

I've figured out how to connect the MII pins since they are pretty straightforward (just connect to the corresponding pins to the PHY).

But for the others, such as pins 28 & 29 MDI_ADRSEL1,MDI_ADRSEL0 i don't know what to do with them.

If you're willing we could discuss on how to connect the pins?

2)This is a rather noob question. Do i connect the Rx of the PHY to the Tx of the module and vice versa? Or Rx to Rx, Tx to Tx? (I'm guessing the latter one?)

Back to PCB again, do you guys think it's possible 2 simplify it into a single layer where i don't use any planes.

Instead i use a star topology for my ground n power traces and have the both of them route together side by side and every power ground pair connects directly to the sources?

No, no. I've only worked with controllers that have MII support. I'm familar with MII, but haven't had a reason to implement it in-circuit. I would recommend Googling for in-depth MII references - there are sure to be a few.

It would seem you need to wire set the PHY in host MII mode, then wire it to the Ethernet PHY as if the module were an Ethernet controller.

Looking at the Bel PDF, they're really not doing much except packaging the Intellon chip. If you want more details, I'd suggest finding the datasheet from Intellon.

Also, from this footnote in the PDF, it would seem that Bel does have reference designs available: "Bel offers a range of coupling transformers designed for use with the

0804-5000-03 and 0804-5000-04 modules. Full details of our coupler products, including designs for low cost USB, Ethernet, Wallplug and Desktop solutions using AC and DC line cords, can be found on our Powerline Signal Couplers data sheet covering the 0557-7700-xx group of products."

I would speculate the former, but even I wouldn't trust that without more research.

Section 2.2 defines the direction of each pin (which are inputs, and which are outputs). This should also be better defined in the Intellon datasheet, since Bel is necessarily copying most of their specs.