dumb triangle oscillator

RC and a pin on the fpga

-Lasse

The test set is separate from the DUT (where the ADC is) and the test set won't have an FPGA.

I guess a rounded RC sort of thing would be as statistically good as a real triangle, but I need an opamp to drive the load anyhow, so I may as well integrate to a clean triangle. It will look nicer, too.

We could compute the duty cycle of each ADC bit, which might be interesting.

if the box have any digital output the could be used as a self test

noise should work too, just do a histogram and check if all 2^12 values hav e been hit

-Lasse

I guess one would have to mash a lot of samples to get a good 4K-point histogram. What with the test PC and our indirect access path to the device, we can't get a lot of samples per second, less than 1K maybe in test mode.

With a small stored sample set, 1K 12-bit samples maybe, we should be able to compute a decent duty cycle on each bit. Some other algorithm on that same sample set should be able to find shorted bits... somehow...

Shorted bit traces (it's LVDS from ADC to FPGA) will probably wreck the bit duty cycles. But other checks should be possible. Given the 1K sample set, the PC can do a lot of math in a reasonable time.

Dumb is good word for it. What's your problem you can't use the time tested technique of dual amp, integrator + comparator, switching at and slewing between two precision thresholds?

Gosh, you must have a lot of friends.

Partly, I don't need all that. I could do that, but it's just a little more work. It's also a matter of what parts we have in stock. If I had a 4000-series d-flop, I could use that and an LM393, running off +-6V, and it wouldn't be bad.

The triangle isn't especially interesting. What is more interesting is the algorithm that will look at the 12-bit samples, 1000 or so, and spot bit failures.

Do you have any I/O available? Seems a real test would use some sort of DAC, this could be a digital POT and voltage reference- seem to recall there are ways to cascade the pots to get very high resolution steps.

You can get a well-regulated triangle voltage with the right Schmitt trigger... R1 adjusts frequency, apply bias instead of grounding R2 for symmetry adjustment

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That doesn't run on my LT Spice, but I think it doesn't make a triangle.

This would probably work...

and it's fairly precise as regards levels and frequency.

Hoo! Haa! Didn't even simulate it did you ?>:-} ...Jim Thompson

At least it should have component values ...

Not exactly a rocket-science task...

...Jim Thompson

Because I want to do statistical analysis on the ADC bits, I need fairly precise positive and negative peak voltages. The 12-bit ADC range is -0.26 to +1.716 volts (I need about twice that to account for terminations) and I figure that I should either clip at the peaks slightly or maybe just barely clip. As noted, the data analysis algorithm is interesting, but the triangle limits should be precise and easily changed.

I guess I should grunt and do the comparator version

The kids would snicker if I used a 555.

Or offset to 0-5V Output...

...Jim Thompson

Yeah, I got lazy; just did enough entry in LTspice to make the connections obvious. I'm still learning (fumbling with) the interface; will get back to it tomorrow.

Meanwhile, R1 = R2 = 40 ohms, R3= 5k, C2 = .002uF is what I have in my notes.

Larkin's second posting gets purer triangle tips, but it takes more parts - basically remaking the '555 innards just to get the other polarity of flip-flop logic output...

while still filling Barkhausen's criterion. If you use an inverting op amp integrator, the extra inversion (180 degrees) makes it not work, you need another inversion. Or, a noninverting integrator...

Right click each component in turn and fill in the values.

Your circuit isn't an actual integrator. It has a "proportional" component that will make jumps in the output triangle. I want a triangle for statistical analysis of ADC codes, so I want it to be pretty good.

And my intended application was pulse-width modulation. The jumps actually help in that context, softening an otherwise-abrupt cutoff near 0% and 100% duty factor. The jumps can be made small enough and placed outside the ADC range, that they oughtn't hurt ADC statistics. The statistics depend mainly on linearity of the slope, which isn't impaired.