dual pulse generator again

This is looking like a real project.

I need a dual pulse with low jitter, something like this:

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The comparators have no spec for voltage or current noise. Worse, their input current transitions from 0 to max as the ramp crosses their various DAC thresholds. Messy.

BUF602 is slick. I was considering a fast current-mode opamp, but their Rf in follower mode makes gobs of noise.

Reply to
jlarkin
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What about a programmable delay line, can they be had with low jitter?

Reply to
Klaus Kragelund

A HR Timer from the STM32 family may also be an option.

Reply to
Uwe Bonnes

There were some old ECL parts, tapped delay lines, but they were awful. A linear ramp and a comparator can be made very good. We've pushed that concept down to about 30 fs RMS jitter.

This one should come out around 1 ps RMS.

Reply to
jlarkin

Why? They shouldn't have been, but John Larkin presumably found some way of screwing them up.

Unfortunately, a linear ramp goes through the threshold region more slowly than an edge propagating through a well-designed transmission line. However good you can make a linear ramp, you can make a delay-line-based solution better, if you know what you are doing.

Somebody with a better grasp of what they were doing could push a better concept down even further.

That's what you get out of a thinned crystal oscillator running at hundreds of MHz. It probably won't.

Reply to
Anthony William Sloman

What is the maximum current the e-phemt can carry. If 100mA then ramp cap could be increased to 1000pF swamping out comparator input messiness and so avoid the buffer completely?

Conversely has anyone tried using inductor current for fast ramps (just idle curiosity)?

piglet

Reply to
Piglet

This one, an SAV541, can conduct 100 mA if the gate drive is kept in spec. But Rds-on has a big positive tempco, around +2500 PPM/K, so you start to get time errors at high currents; hence the modest current and the buffer amp.

The MIT RadLab books mention that! One can linearize the ramp by putting an inductor or ferrite bead in series with the charging resistor, but that only works at low duty cycles.

Fast linear ramps aren't very linear anyhow, so the first 3 volts of a

10 volt exponential is not so bad. We do polynomial curve fits, with 16 bit DACs, to set timings.

My six comparators wind up stepping their several uA bias currents as the ramp runs, another reason to use a buffer. I should change the 20 ohm resistor to 10.

This circuit has a lot of subtleties; I had to make a list.

Reply to
jlarkin

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