DSP Device for Guitar Pedal Effect

This makes perfect sense. Before doing anything with a DSP, get the stuff to work on PC with a sound card.

Aliasing is a natural phenomenon. You will see it in digital as well as in analog.

Harmonics are the multiples of the fundamental frequency; aliases are generally not.

Vladimir Vassilevsky DSP and Mixed Signal Design Consultant

Presumably by "a few more" you mean lines of code to implement stuff like cos x = sin(x+pi/2), sin(pi-x) = sin x, sin x = -sin(x+pi), and so forth. Thus one can use one quarter-cycle table for both sin and cos. Also it is straightforward to use a one-term Taylor series so that a much-smaller table suffices. sin(x+h) ~ sin x + h*cos x and cos(x+h) ~ cos x - h*sin x with accuracy improving quadratically as table size increases. With n = 64, 128, 256 and 512 and |h| less than pi/(2n) the maximum relative error and maximum absolute error at angles (k*pi)/2^16 for any integer k are like in following table.

n Max rel err Max abs err 64 0.000502 0.000301 128 0.000125 0.000075 256 0.000031 0.000019 512 0.000008 0.000005

That's neat. My math is old and I haven't needed extreme accuracy in the past, but that one goes in the methods logbook to look into further !. I use sin tables for embedded graphics work primarily. Things like object rotation, which needs a new x,y screen address calculated for every pixel within the object. It's very compute intensive and unusably slow using standard library calls. Table methods can allow the use of a much lower performance cpu while still getting adequate performance. Modern micros often have hundred's of k of flash code space, so it makes sense to do the math offline, rather than at runtime. For a 16 bit table, the entries are calculated and scaled so that sin (90) is close to 65535 to maximise accuracy, then scale the range of the system data to suit.

The 'added lines' for cos were just to handle the fact that with a one quadrant table, you need to start reading back from the end of the table for cosine, rather than from the start in the sin case. For graphics, you often need to work in all 4 quadrants, but that can be handled by inversion and reflection on a single quadrant table...

Regards,

Chris

You must have some pretty trivial problems then.

One design was a legacy (1996) counter driven state machine pwm driver with less than a dozen ttl devices and an eprom. A gate array looked attractive and would have been a good excuse to get into a bit of vhdl, but it was a lower cost solution to use a silabs 8051 micro as a one chip solution and already had the tools from other projects. The other thing was design tools. Yes, you can download demo versions, but you end up with Gbytes of hard disk space. Even using the smallest gate array from Lattice would have been uneconomic compared to the micro solution, and would still have needed the eprom.

So what complex problems are you solving with gate arrays and what speeds ?...

Regards,

Chris

IOW, pretty trivial stuff. I'd likely use an 8051 for that too (and pass the crap job off to the firmware group ;-).

So what? A 1TB drive is under $100. BTW, they aren't "demo versions". They're fully capable versions, just somewhat limited (usually something like

In my small company, I *am* the firmware group, and think software design far more than hardware these days :-).

Not so cheap in the uk in small quantities and more expensive than an silabs 8051. Using a gate array, would still have needed the eprom, as the sine tables wouldn't fit, whereas they just go in code space using an mcu. I get other benefits like self test, an a-d for soft start, voltage regulation, current limiting etc and a serial port for status messaging. There's even a temp sensor on chip !. Makes a far more capable product for a couple of weeks of software effort, which you would need anyway using vhdl.

As an aside and have no commercial interest, the Silicon Labs fast 8051 series are quite amazing. They are typically 50 mips risc cored updates of the 8051 architecture and the dev kits range from ~$100 down, with all the hardware and dev tools. You can get started building and running the simple demos out of the box within 30 minutes or so. I don't really rate the 8051 architecture that highly, but the latest versions do a good job even with everything written in C.

I guess everything's software now, even hardware design, so if there's not much difference in cost, it probably comes down to what you are most familiar with in the end...

Regards,

Chris

I see the Spin chip is 6 MIPS, at 48kHz sample rate that only allows about 125 instruction steps per sample. I was thinking of some thin with at least 30 MIPS.

I see those Silicon Labs devices run at 50 and 100 MIPS, that would allow a higher sampling rate. Other thatn that they seem overly capable.

I only need 1 ADC input and 1 DAC output, and whatever I/O necessary to support table data if used.

Regards,

Fred

The si labs stuff is very good for a certain class of project and they are fast, but couldn't say for sure that they would have enough real time capability for audio sampling and processing. They are an 8 bit architecture and any code that requires 16 or 32 bit operations will result in a lot of code. The kits are very low cost though and modelling the application, possibly at a lower data rate and resolution, would provide a lot of insight in terms of what was really needed for the task, especially if you have no previous experience of dsp solutions (I don't, either :-).

Some of the variants have 24 bit adc's which would be more than good anough if the sampling rate is high enough. You could use a timer driven interrupt level state machine to control the adc and to connect the samples to the mainline code processing section. It may very well be possible, but you may need to add an spi 16 bit dac to get the final analog output...

Regards,

Chris

Analog and Infineon 16bit devices are looking good, their in the 40-80 MIPS range. There's a few PIC that might work too, 32MIPS though.

I guess it will take me a while to sort thouugh all the canidates... :)

BTW I just realized that I could easily sim the algorhythm with behavioral sources in SPICE, so I've been making audio clips and running PCM files though that.

It's good to see and hear the idea in action, especially since I've had it on hold for years now.

Regards,

Fred

Obviously. ...even when the solution should be in hardware.

Why wouldn't they fit? Xilinx stuff has piles of RAM/ROM/dual-port stuff. The Actel and Altera stuff I'm using is just small enough that there is no block-RAM. I'd like to have it but for this application don't really need it.

There is no reason all that stuff couldn't be done in hardware.

C. Ick!

Spoken like a true software weenie. There is a *tremendous* difference. You really should add another arrow to your quiver.

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Part of the whole idea. The more tools in your toolbox (all reasonably well understood) the more and better tradeoffs you can make between different approaches. But then again i tend to be a specializing generalist.

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I don't know how versatile you are, but you could try capturing several input waveforms, and running them through the algorithms on your PC and playing them back.

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CORDIC is an acronym, it means COordinate Rotation by Digital Integrating Computer. It was chosen for implementing the transcendental functions on the 8087, 80287 and 80387 for because it was less computational effort for equivalent results. It is actually worthy of study in its own right.

I presume you mean a Programmable Logic Array. I'm clueless about them as well as FPGAs. I lack any idea of how the arrays would/could be programmed to do my non-linear transform.

Been doing that. I have a digital multi-track that that I record a guitar part on, then transfer to computer, through a digital to analog back to digital process. It's an old unit, although the results are tolerable.

After I have the wave file on the computer, I use that as input for a voltage source in SPICE and output the processed voltage to another wave file that I can play with a media player to hear.

It's really a trivial process. I could have done this years ago had I realized SPICE's PCM abilities. :)

I read about that. Seems easy enough. I have to work out how many iterations would be required, how many instruction cycles each iteration would entail, and balance that with the controllers speed and sampling rate. Again easy enough.

First I have to re-verse myself with coding. It's been 5-6 years since I did anything in C, and even then it was only some basic numerical routines, Fibonacci stuff. And for assembler, that was only one class in college, uh, twenty five years ago. :)

That all should keep me from getting bored for a while...

Oh by the way, could you give me an overview of how a logic array could be programed to do this?

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Yes. Kazaam. PWL (piece wise linear) sources in SPICE can illuminate many ideas nicely. Also PWL file IO.