Dividing a 32768 Hz crystal frequency

Table lookup is great for DDS, where not many MSBs of the phase accumulator are used. I've brute-forced a 16 bit sine function the dumbest possible way, a lookup table with 65536 entries.

On a Pico, one would copy the sine table into RAM, maybe unfold it from flash at powerup.

I wonder if a Pi Pico can run code, the DDS ISR, out of ram. That would avoid cache misses.

Yes!

So one core can run the fast realtime stuff fast, and the other can do the slow junk (ethernet, USB, command parsing, all that) from the flashcache.

The thing that impresses me about the Pi is how they did everything right.

onsdag den 28. juni 2023 kl. 23.58.43 UTC+2 skrev John Larkin:

running in-place from eeprom with cache is just convenient when you have a large program, some of it possibly not very time critical

you can run all you code or part of it in ram on a pico, if it fits

Possibly all of it. Certainly all the code for one core, the one that does realtime stuff.

torsdag den 29. juni 2023 kl. 00.06.36 UTC+2 skrev John Larkin:

it's just an mcu, I don't see how they did it particularly "right" compared to all the others

One of the many things they did right was guarantee availability of the RP2040 chip until 2041. And price it at $1.

The Pi Pico board is $4.

The RP400 dev/debug system comes all done, ready to run, for $70.

There's off-the-shelf non-watch-crystal items like this

that can be programmed for any frequency in their range (10 to 160 MHz) available for about $5 each, programmed to spec, at Digikey.

To do their trickery on-chip, lower frequencies will still take an external divider... and the CD4017 tricks work best with 10 x 2^N division, just pick N.

------------------------ JW wtote:

** A 100ppm error amounts to over 4 minutes in a month. Even budget " Quartz" clocks do about 100 times better than that.

...... Phil

Which means nothing, because 100 ppm is the spec limit, not indicative of what any particular crystal will do. If you understood tolerances, you would know that to achieve an acceptable failure rate, the actual parts would typically be in a ~10 ppm band.

If you have a process for making 4 ppm crystals reliably at a price point for watches, you need to patent that.

I remember in the early days of digital watches, I had one with a trimmer capacitor. I would adjust it to be "spot on" and then it would drift. While there is a spec for initial tolerance, there is also a spec for age drift, which people pay attention to much less. There's also a spec for temperature drift, which is much less important for personal time keeping, as most people don't keep their clocks in the refrigerator.

I also had a watch with a built in thermometer, which was pretty cool. It could correct for body heat, or you could turn that off and use it as a dive watch. That was very nice, and I've never found another inexpensive watch with that feature.

Watch crystals are cut on a quadratic drift rate curve centred at around

25C so they are normally very good stability at household temperatures.

The worst case error is typically about 50ppm and one sided for the range 0 to 50C (if the crystal is correctly loaded and driven).

Most homes maintain a steady ambient temperature.

They age a bit and drift long term if you care about that and will perform less well and deteriorate faster if over driven (as many are).

Curiously some older quite high end (amateur) kit has been made with incorrectly loaded RTC crystals like the Meade LX200 computerised telescope that keeps keep terrible time ~5 minutes a month drift.

Changing a couple of capacitors and one resistor would have fixed it! They "cured" it by bringing out a model with GPS to (re)set the time!

sure, so long as the clear is asserted for long enough to reset all the flip-flops in the ripple counter. in a CD4060 the flip-flops are faster than the minimum reset pulse width. so you possibly need to add some delay after the and gate to be certain that it will reset to zero.

the reset will also mess with the crystal oscillator

---------------------------------

** Yep - the most common frequency drift is the temp rising above room ambient inside the equipment where the crystal lives. Obviously one should avoid siting the crystal next to a heat source but if possible (and needed) install a tiny DC fan that cools the crystal with outside air. Did this with my bench 1GHz frequency counter eliminating the previous warm up drift. FYI the counter is used to check VHF and UHF radio mic equipment. With a short antenna plugged into the BNC input, enough signal is picked up to work the internal pre-scalar at close range to a transmitter.

..... Phil

I think a starting point for this is that the clock period is much longer than the time required for the counter to settle into a particular state.

However, given that the reset signal is generated when state N exists, and the reset will cause state N to cease to exist, the reset pulse is going to be quite short. If one were trying it with something like this:

it might well work, but there's no way one would be complying with the worst case reset pulse width requirement (page 4).

Sylvia.

Cheap XOs are often specified around 100 PPM but usually arrive within a PPM or two. An oscillator made from parts is unlikely to be that good, if it oscillates reliably.

The prop delay of the AND gate, and the clear delay of the counter, will generally make a reliable reset pulse. It pretty much has to work.

The reset pulse lasts until at least one of the flops clears. And more.

If you ac-couple into a cmos gate and add a high-value feedback resistor, it sort of self-servoes its bias. And gets weird if there's no signal.

Why would you not register the reset pulse? Then it lasts a full clock cycle.

You would if you designed the circuit properly. Clock the reset FF from the rising edge of the clock, and the final state will appear for half a clock, and the counter will be in the zero state for a clock and a half.

torsdag den 29. juni 2023 kl. 17.26.05 UTC+2 skrev John Larkin:

fig.13

Delete R1 and it becomes my self-biasing comparator.

I invented that when I was a kid. It's barely possible someone else used it first.