Ditch your power plane and star route Vcc?

I happened to come across this article:

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...where it is very adamantly recommended that a typical four-layer PCB stackup should be something like signal-ground-power *routing* (not a plane)-signal, rather than using the more traditional power plane for one of the inner layers. The idea is that you then perform "star routes" to the various power pins on your ICs, starting from large branch lines or somesuch. The authors state,

"While it may be tempting to use a large power plane to simplify the routing of the VCC signals, this approach will most definitely lead to degraded system performance. By tying all of the supply voltages together at a large plane, it is impossible to prevent noise transfer from one pin to another."

While there's certainly some truth to the later sentence, I'm thinking that the tight (capacitive) coupling of a traditional power and ground plane largely attenuate the noise to begin with, and local bypass caps then kill off pretty much whatever remains when it bubbles up through a via near another power pin. Still, I have to assume the authors had some bad experience with power planes and found their star routing approach fixed the problem.

So the question is... does anyone here design their boards this way? Does it really help that much? Or did it possibly even make things worse?

The rest of the article has suggestions for reducing noise that are in-line with my experiences. In particular I've had some pretty badly behaving PLLs (very large PFD spurs), and suspect that their suggestion of power supply noise (rather than an inadequate loop filter) being the cause are likely.

---Joel

Reply to
Joel Koltner
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These guys would be dangerous morons if anyone took them seriously.

The stackup Signal-Ground-PowerPOURS-Signal is common and works well. It allows controlled-impedance signals on L1 and L4, keeps the L1 traces quiet, provides good grounds to topside parts, and heatsinks power-pad parts nicely. As you note, the capacitance between power pours and ground is a primary power-impedance-control thing, especially if you keep the L2-L3 dielectric thin. The bypass caps are much less important (and can be *much* less numerous) if you have good power pours.

The point, which the authors miss, is to keep the power pours very stiff to ground so that there is little supply noise on them. His long skinny traces with bypass caps at the end are various frequency resonators!

If specific pins, like an ADC Vcc_analog, need to be super cleaned up, do that locally, at the pin, with maybe a ferrite-bead-capacitor lowpass off the power pour. Be careful about resonances.

How the hell are you going to control L4 trace impedances if they're riding over some random spiderweb of power star stupidity?

Oh crap, the idiot authors work for Maxim. The Company That Screws You When It Can.

John

Reply to
John Larkin

Quote from the article "Split ground planes or split traces can be used to separate analog and digital signals, ..."

Oh man ...

Besides what John wrote there is another danger that lurks when you do star runs: The outer layer next to the power layer happens to carry live signals. Digital, RF, whatever. Imagine there is a trace that is driven by one of those mean-machine clock drivers and happens to run near or across one of those stubs. Then all hell can break loose.

--
Regards, Joerg

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Reply to
Joerg

I think their next sentence, "However, based on previous experience with WLAN EV board design, a single solid ground plane in a four-layer stack-up board works well," suggests they're tending to reject the split ground plane idea, they just haven't bought into it 100% yet.

At least I hope so. :-)

Reply to
Joel Koltner

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Star power routing is a very valuable tool to have, but the number of places I've seen where it is essential is very very small.

The situations I know of where it is essential involve a lot of gain (80dB or more - sub microvolts on the input end and big signals at low impedances on the output end) and I'm willing to believe there are other corners of design where it may be important too.

Tim.

Reply to
Tim Shoppa

df

Wow... that board they use in their example looks a LOT like - maybe even identical to - my AD9954 synthesizer.

Tim.

Reply to
Tim Shoppa

Then I wouldn't have used the words "can be used" :-)

--
Regards, Joerg

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Reply to
Joerg

That's where one would usually provide separate copper pour areas that are connected to the rest via a small resistor, and bypassed. To make sure there is no noise feeding across or feedback could develop.

--
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Reply to
Joerg

"Split ground planes can be used to separate analog and digital paths, resulting in a board that will probably require debugging help from the likes of Joerg to make functional." :-)

Reply to
Joel Koltner

We rarely slit or split a ground plane, but we do put a bunch of mixed power pours on one layer, L3 in this case...

ftp://jjlarkin.lmi.net/T860A.jpg

Contrary to what HoJo says, nothing dramatic happens if an L4 signal trace crosses over the L3 boundary of different pours. The power pours are all equipotential at AC, so the trace doesn't care where its "return current" goes.

There is *so* much nonsense about grounding/power distribution/bypassing/fast signal routing. I'm sick of lectures about "return currents" and Spice models of various combinations of bypass cap resonances.

John

Reply to
John Larkin

Right at the critical pin, pick off the power pour voltage and locally filter or re-regulate it. Or have a "quiet" pour that's filtered/regulated off the "noisy" pour.

Stars are OK if you don't mind the extra resistance and inductance. Or the impedance effects on adjacent signal layers.

John

Reply to
John Larkin

That's the way to go.

As long as the end of the trace is properly feng-shui'ed :-)

Boggles my mind how many hours some engineers spend on simulating all this. A good 0603 0.01uF goes almost to infrared ...

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Regards, Joerg

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Reply to
Joerg

somesuch.

I am a fan of quiet pours and beer pours.

I've seen lots of grief with stars. Usually stuff from bus traces coupling into them. Heck, even from iPhones and Blackberrys. GSM seems to be harder on that than CDMA for some reason.

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Regards, Joerg

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Reply to
Joerg

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HoJo charges a ton of money to attend his silly seminars. He challenges people to debate him, but first you have to shell out $600 or whatever to get in. Nice racket.

And a good power pour, over a ground plane, is a wonderful low-Q, zero-inductance capacitor. Scatter a few 0.33u 0603 ceramics around, for the slow current surges, and it's as stiff a wideband voltage structure as you're going to get.

It's so easy I don't understand why so much is made over this issue.

John

Reply to
John Larkin

OK, but you wouldn't move those controlled impedance (?) lines (e.g., from R27 to U9.6 and R23 to U9.7) from L1 to L4, would you? ;-)

I suspect the problem is that while some return current has a "hard time" jumping a gap (having to finder a longer path that creates EMI/impedance bumps/etc.), it's not the whole story and, indeed, turns out to be only a bit character. Yet it's easy to understand and makes for easy-to-apply rules of thumb, so it's assumed a role of importance that isn't wanted. (And perhaps guys like HoJo and Eric Bogatin are spending there time speaking at seminars and running simulations moreso than building real boards and measuring them...)

I do like Doug Smith's work, since he actually builds and measures his stuff. Plus he looks like a proper engineering guy pulled from a late-1970s IBM lab. :-)

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This reminds me of a homework question I had in a circuits class some years ago, asking you to explain why, if you're matching one impedance to the other, you shouldn't use resistors? While the whole maximum power transfer, blah, blah answer is good and all, it fails to take into account real-world scenario where there's plenty of partially-resistive matching going on due to the desire for wide bandwidths (try matching, e.g., 5000 ohms to 50 ohms over a couple of decade and see how big of an LC network you need...), isolation, etc... plus often you just don't need maximum power transferred at every single stage. These days I figure that if Steve Cripps occasionally drops in a resistive pad to improve his return loss on his power amplifiers, no one can fault me if I occasoinally do the same. :-)

---Joel

Reply to
Joel Koltner

The problem is that, if the manufacturer's data sheet's example circuit had a bazillion caps, few people are willing to remove a bunch because they don't want to become the primary suspect if the board doesn't work. (Particularly if "doesn't work" involves things like too much phase noise, spurs on an RF output, etc. -- things that can have many different causes and be difficult to isolate.)

Check out pages 14 and 15 of the evaluation kit documentation for an ST PLL:

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-- do you think they're getting carried away with decoupling caps? (It is a standard 4-layer board.)

---Joel

Reply to
Joel Koltner

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Whoa! Makes the $50 I paid for HoJo's book at the Stanford Bookstore look like peanuts.

But RF debugging ain't about debate, it's about getting things done. Once I and the client's engineer were scolded for not showing up for a meeting. They had faxed the memo to my office while I was already in the air so I never knew about it. "What's the topic of the meeting?" ... "Devising a strategy to reduce the FFT noise band in the Doppler system" ... "Ahm, we fixed that this morning, it's gone" ... "Oh"

Darn, they had bagels in that meeting. The good stuff with schmear and everything. All gone, too :-(

Well, the confusion over the issue does put bread on this here table ;-)

--
Regards, Joerg

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Reply to
Joerg

Well, that would add four vias, but should work fine. It's only a 1 GHz gadget.

More profitable! Like Al Gore.

I ignore "return currents". The whole ground plane/power pour structure looks like one solid ground to a signal trace, from either side... it's firmly glued into one monolithic, equipotential slab by the inter-plane capacitances.

And I *have* TDR tested enough traces and planes to know what's real.

Well, he has the return current fixation, too.

John

Reply to
John Larkin

If you have a lot of sensitive, high impedance analogue stuff coexisting on a digital board, power planes are a disaster. I once had a gizmo that had ONE PAD on top of an only mildly noisy power plane, which was enough to blow the whole thing out of the water. So relieve the power planes under the sensitive stuff.

Otherwise, power planes are a Good Thing.

Cheers

Phil Hobbs

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Dr Philip C D Hobbs
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Reply to
Phil Hobbs

Well that is pretty plain to see.

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Abbey Somebody

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