debounce state diagram FSM

I'm designing a debounce filter using Finite State Machine. The FSM behavior is it follows the inital input bit and thinks that's real output until it receives 3 consecutive same bits and it changes output to that 3 consecutive bit until next 3 consecutive bits are received. A reset will set the FSM to output 1s until it receives the correct input and ouput.

This is the test sequence with input and correct output.

1 0 0 1 0 1 0 0 0 1 0 1 1 1 (input) 1 1 1 1 1 1 1 1 0 0 0 0 0 1 (output)

The state diagram I came up has 6 states and it's named SEE1, SEE11, SEE111, SEE0, SEE00, SEE000. I am getting stuck at 11th bit, a 0 in the input. Because it just came from SEE1 and before SEE1, it came from SEE000, so at SEE1 it can not change ouput to 1 which is what I have specified that state's ouput to be.

Anyone knows how to solve this problem? Or maybe there's other better ways to design the state diagram?



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schreef in bericht news:

Came into this this discussion late. Read the available texts but sure missed some due to the "experimental" status of my ISPs newsserver. Also did not analyse the tables to make sure I make my own mistakes:) So I came to the next table:

Input Curent Next state state 0 000 000 1 000 001 0 100 000 1 100 001 0 001 000 1 001 011 0 011 000 1 011 110 0 110 111 1 110 110 0 010 111 1 010 110 0 111 101 1 111 110 0 011 000 1 101 110 0 101 000

All possible (eight) states have been accounted for. As you need only six states, you can combine state 000 with state 100 and state 110 with state

010. The leftmost bit of the state code is your output signal. See state diagram below. +--+ 0| | | v .------. | 000 |----------+ +--------->| 100 | | | | || | | | | 110 |
Reply to
petrus bitbyter

petrus bitbyter wrote: (snip)




This is exactly the state diagram I drew before answering=20 the post. Nice work.

Reply to
John Popelish

This has nothing to do with comp.lang.c. Please remove that newsgroup from your distribution.


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Default User

I don't know where the original poster is reading this thread.

You could make this discussion relevant by translating the algorithm into C.

Reply to
John Popelish

Almost nothing is on-topic in comp.lang.c

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Best regards, Spehro Pefhany

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Reply to
Spehro Pefhany

Damn. I see what you mean.

Reply to
John Popelish

FAIK the OP was asking about the design of a finite state machine. Nothing said about the implementation. C is a perfect language to build finite state machines. The solution can for instance be implemented in a microcontroller using C, most likely as a part of a larger design. (Although I'd prefer assembler for small programs.) It can be implemented the same way in programmable hardware using VHDL or Verilog. As a matter of fact, it is so simple you can even implement it using old fashioned devices with flipflops and gates. I can build all this possibilities plus some I did not mention. Still complaints?

petrus bitbyter

Reply to
petrus bitbyter

If esd is not an issue, debouncing can be just running the switch level through a d-flop that's clocked at, say, 20 Hz. And if the switch is going into an embedded processor or equivalent, don't even do that: just check it 20 times a second.

If esd is an issue, you may need a real r-c before you hit any semiconductors. So do the r-c, then the stuff above.


Reply to
John Larkin

C.L.C is for discussing the C language, anything else (eg: algorithms, a particular implementation of c, or actual code) is off-topic.

If the kooks were to hit CLC noone would notice the newsgroup was when I stopped reding it 20% off-topic posts, 40% complaints about off-topic posts,

10% questions answered by the FAQ, 25% "read the FAQ", and 5% actual on-topic posts (which were boring as hell).

C.L.C.moderated is a better group, as long as you're not in a hurry for an answer, the rules of topicality are ironically more relaxed than in the non-moderated group.

Bye. Jasen

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Then change the "Newsgroups" field, like I've done with this post.

Good Luck! Rich

Reply to
Rich Grise

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