CV measurement

Hi all, I want to do some CV (capacitance vs voltage) measurements On some diodes and things. I drew up this,

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Pretty much brute force. (I sometimes get the feeling that opamps are the only tool I know.) I don't really like putting the bias and modulation through the same opamp. Any other ideas? (I don't want to go the transformer route.)

Thanks George H.

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George Herold
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Get a Boonton 72 off eBay for ~$100. They have external DC bias inputs, and work really really well.

Cheers

Phil Hobbs

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Phil Hobbs

They have a demodulated analog output, so you could automate it with a LabJack or some such.

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John Larkin         Highland Technology, Inc 

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John Larkin

Hmm Maybe I should get one. But I was thinking of a circuit that might go into something we sell.

I notice the Boonton has synchronous detection.

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Is that how they take care of the phase angle? (maybe I can just implement that in my labview software, ducking :^) George H.

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George Herold

Last time I did that, I used a CCS and measured dV/dt. The CCS was verified to have good compliance and stability, and the rig was tested for intrinsic capacitance (over the voltage range, it was pretty stable in the

60-70pF range). It was also verified that switching was complete by the time data collection began (base/gate voltage at zero, charge injection died out), so that the data is not affected by Miller effect of the switching device.

Here's a calculated result (jig capacitance not subtracted out), overlaid with the datasheet graph, which I suspect contains a graphical error.

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Curiously, the data best fit a two part piecewise exponential. The actual "best fit" function I used resembles JT's obsession with hyperbolic functions, though I believe I did this work before he started babbling about them here. Oh well, it's just functions, whatever works best.

Raw data follows below as an example.

This works nice for things with integrated switching capability (like MOSFETs..). A very low-C rig could be made, or bootstrapped in some way perhaps, for use with low capacitance transistors and diodes.

Even then, the accuracy gets questionable down in the single digit pF. It's probably not so great around hysteresis (ceramic caps) either. In these cases, a more traditional "bias tee" approach would probably be better.

Tim

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Tim Williams

Yes. They really rock. the low range is 1 pF full-scale.

I like the analog-meter versions.

Yes. They use a low-level sinewave drive (20 or 100 mV, I think, on different versions, semiconductor-friendly), tuned circuit amp, and synchronous detector.

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John Larkin         Highland Technology, Inc 

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John Larkin

So you did a square pulse or some such of current and then measured the final voltage? (after some known pulse time.) That's not going to work for me (I don't think.) There could be some series or parallel resistance. I think they even take data with the diode slightly forward biased.. like 100mV or so.

OK.. data looks a little noisy. (no offense intended.)

For the diode's it goes as 1/V**2 or something like that. I can pull out the carrier density if I know the area.

Thanks for the response.

George H.

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George Herold

Yup. I like meters too.

Hmm, Yeah I'll have to keep the drive low,

100 mV might be a lot if I'm looking at a diode near zero bias. A little lock-in thing might be OK.. Are there any newer lock-in chips besides the AD630? Or does everyone do this in software these days? (For now I can use my digital scope as a lockin.)

George H.

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George Herold

Ducking won't help. Labview is like an explosion in a sewage treatment plant. There's no place to hide. ;)

Synchronous detection helps a lot, because if you're just using amplitude, your resolution falls off quadratically as you go away from omega RC = 1.

Cheers

Phil Hobbs

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Dr Philip C D Hobbs 
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Phil Hobbs

Is that how they take care of the phase angle?

Muxes have gotten so good that there isn't that much call for dedicated lock-ins or (slow) sample/hold chips any more, at least if you can live with a single 5V supply. My little boxcar lock-in board (that Beautiful Layout Hunchback just generated Gerbers for) uses DG2042s for both. They look amazing in the datasheet, and hopefully are equally so in real life. We'll see in a week's time.

Cheers

Phil Hobbs

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Phil Hobbs

The Brat has evolved a pre-gerber checklist, to catch the zillions of things that can go wrong. I'll ask her if she'll share it.

Are you using the single amp with +-1 switched gain, or muxing between sig+ and sig-, or something else?

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John Larkin         Highland Technology, Inc 

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John Larkin

Not pulsed, the CCS was constant and a switch reset it periodically (namely, the transistor itself).

And yeah, the other thing that won't work, leakage...

ESR wouldn't be a problem, so long as current is small enough. That's like with supercaps for memory backup... you can get farads and kohms, so it doesn't much look like a capacitor at much of any frequency.

No offense taken. Consider it left in to emphasize the inherent variation in such a measurement (derivatives being what they are). A smoothed curve lies. Like a woman with makeup. :)

This MOSFET doesn't fit into the usual junction abruptness scheme, because it's a superjunction type. The junction is thin and dense "up close" (below 20V or so), then just kind of snaps open as the barrier edge expands through a near-intrinsic region. The difference is, it's columns of p- and n-, not actually intrinsic. I forget how it's supposed to respond differently than a PIN junction, but it's always distinctive on datasheets: in particular, the reverse transfer capacitance is dramatically low (a few pF by 50V?), and almost always shown to rise slightly at higher voltages (a few pF more by 200-500V?). These are 600V+ class MOS devices (the structure apparently isn't as valuable below 200V or so).

The huge low-voltage capacitance means turn-off Miller effect and all occurs at low voltages; it looks like a shottky diode (which is also pretty dramatic in capacitance, though more in magnitude than abruptness), which is to say it's like diode recovery, except occuring over higher voltages (say, 0-20V, rather than -2 to 0). If you graph the time series I attached, for instance, you can see this.

They also tend to show full DC SOAs, in contrast to most VDMOS which do not (MOSFETs having no "second breakdown" was only true back in the days of ancient lateral DMOS and early VMOS). I wonder if the combination of low capacitance and DC SOA is at all attractive for RF purposes?

Tim

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Tim Williams

That would help a good deal. This is only Magdalen's second client board. The first one was a 3 GHz difference amp that wound up needing a bunch of bandaids, but that was my fault not hers.

A quad SPST package, set up as two pairs that alternate between signal and ground, 180 degrees out of phase, with a diff amp on the output for extra room light rejection. That was simpler since the supplies are +5 and ground. Back in the day I'd have made +- copies using a

The CPLD supplies the four switch signals, which use 10 states: four high, four low, and two with all switches off to let the amplifiers settle in between. After the switch-selected N cycles of that (2

Reply to
Phil Hobbs

So just roll my own... that's OK, certainly cheaper than the AD630.

Well just don't fire it up on friday afternoon, unless you want to spend the weekend thinking about it :^) I guess that doesn't apply to you, for whom every day is Saturday.

George h.

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George Herold

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George Herold

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Phil Hobbs

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