current limiter

Inverse series jfets (optionally with source resistor)?

With LT Spice the device matching will be perfect :)

piglet

Does it have to be a real component ?

You might present it as an arbitrary device defined by simple math and if statement ?

A bridge rectifier and current source in a subcircuit.

Cheers

Phil Hobbs

--
Dr Philip C D Hobbs 
Principal Consultant 
ElectroOptical Innovations LLC / Hobbs ElectroOptics 
Optics, Electro-optics, Photonics, Analog Electronics 
Briarcliff Manor NY 10510 

http://electrooptical.net 
http://hobbs-eo.com

I've never done a hierarical schematic. The LT Spice explanation doesn't make much sense to me.

I tried using a current source with the LOAD attribute, but it's goofy.

I guess I can draw three uglies.

You can roll your own as a subcircuit built around the diode model. You can specify resistance, max current flow. I use this subcircuit I found on the internet:

--------------------------------------------------------------------

• Current Limiter Device.

• I = Current limit.

• V = Optional forward voltage drop.

• R = Optional series resistance (note: R=0 may leed to divergence).

• Use as: X ilim I= R= V=

• snipped-for-privacy@ieee.org - Feb 2 2016.

.subckt ilim a b I=1 R=0 V=0 Df a b IfLimDiode Db b a IfLimDiode .model IfLimDiode D(ron={R},ilimit={I},vfwd={V}) .ends ilim

-------------------------------------------------------------------

I have found that specifying a small amount of resistance will help it work better, it can oscillate into and out of current limit if you leave the resistance as 0.

That's interesting. I never understood what the ILIMIT parameter was. It doesn't seem to correspond to any physical reality.

It can be done with a single diode:

Version 4 SHEET 1 880 680 WIRE 224 48 144 48 WIRE 352 48 304 48 WIRE 144 112 144 48 WIRE 352 112 352 48 WIRE 144 240 144 192 WIRE 352 240 352 176 FLAG 144 240 0 FLAG 352 240 0 SYMBOL diode 336 112 R0 WINDOW 0 58 14 Left 2 WINDOW 3 53 40 Left 2 SYMATTR InstName D1 SYMATTR Value Dcc SYMBOL voltage 144 96 R0 WINDOW 0 -79 72 Left 2 WINDOW 3 -165 112 Left 2 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value SINE(0 10 4) SYMBOL res 208 64 R270 WINDOW 0 -34 54 VTop 2 WINDOW 3 -39 54 VBottom 2 SYMATTR InstName R1 SYMATTR Value 1m TEXT 512 208 Left 2 !.tran 0 1 0 5u TEXT -24 296 Left 2 !.model Dcc D(Ron=1m Vfwd=1m Vrev=1m Ilimit=5 Revilimit=5) TEXT 488 80 Left 2 ;Bidirectional Current TEXT 520 112 Left 2 ;Limiter Diode TEXT 504 152 Left 2 ;JL Dec 4 2020

(fix wrap on that long line)

That works.

I put it into a real circuit, and Spice won't run it. It complains about time steps and node errors and its usual nonsense.

You may need to put high value resistances from each end of the floating I limitrer to ground to keep the matrix happy.

I usually place this text as spice directive in my hard to converge schematics....

.options gmin=1e-10 .options abstol=1e-10 .options reltol=0.003 .options cshunt=1e-15

It is from

This works well enough for me to figure out what I need

but this won't run, even with your tweaks

and right now I need to move on. LT Spice is like a race horse, fast and fragile.

--

John Larkin      Highland Technology, Inc 

The best designs are necessarily accidental.

It should be simple if you have a decent simulation. The included ckt is on e way to do it. LTSpice keeps telling me it is having syntax errors so forg et them. The circuit you want is the combo VCVS, V1, and the CCCS, I1. V1 is set to the voltage at the output node driven by the CCCS, and the CCCS is limited by the less than super-efficient function shown.

So, to use this thing:

1) break the branch passing current to be limited and direct it to circuit common thru current sense source V1, 2) insert CCCS I1 from circuit common to branch output node connected to yo ur original circuit.

The simulation *should* solve it, and the solution should be exactly the sa me as the current limited circuit. The included file is for a simple sweep test ckt. The "1.0" in the limit function for I1 is the magnitude of the cu rrent limit in whichever direction. I must have it drawn wrong or something because it keeps getting flagged for syntax on I1.

The circuit is not "elegant"- thankfully.

Version 4 SHEET 1 880 680 WIRE -16 160 -112 160 WIRE 112 160 64 160 WIRE 208 160 176 160 WIRE 368 160 288 160 WIRE -112 208 -112 160 WIRE -112 320 -112 288 WIRE 112 320 112 160 WIRE 112 320 -112 320 WIRE 144 320 112 320 WIRE 176 320 176 160 WIRE 176 320 144 320 WIRE 368 320 368 160 WIRE 368 320 176 320 WIRE 144 368 144 320 FLAG 144 368 0 FLAG 336 144 OUT SYMBOL current 208 160 R270 WINDOW 0 32 40 VTop 2 WINDOW 3 93 82 VBottom 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName I1 SYMATTR Value "" SYMBOL voltage -32 160 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 4 56 VTop 2 WINDOW 123 0 0 Left 2 WINDOW 39 4 56 VTop 2 SYMATTR InstName V1 SYMATTR Value "" SYMBOL current -112 288 R180 WINDOW 0 24 80 Left 2 WINDOW 3 24 0 Left 2 WINDOW 123 0 0 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName I2 SYMATTR Value 0 TEXT -328 280 Left 2 !.dc I2 -2 2 0.1 TEXT 144 80 Left 2 !I1=sgn(I(V1))*min(abs(I(V1)),1.0) TEXT -40 216 Left 2 !V1=V(OUT)

I assumed sgn(x) is 1 for x >=0 and -1 for x

Yes, looks like a tough one.

I tried it with the list of 4 .options and it ran to about 1.2 ms and anything after that it stopped early. But it did stop giving the time step too small for node "a" though !

Sum Ting Wong