Supposedly, 74HC series logic can even operate at 1.8V -- switching is very slow (just as others have mentioned), but the current consumption is very small, because both transistors are never conducting at the same time (Vdd <
2 * Vgs(th) so they don't shoot through).
I would expect the same applies to other processes, but I get the impression transconductance isn't proportionally higher in high density processes. That is, a 5V process might go from fully off (below threshold) to reasonably on over a change of 1V (20% of the supply). A 1.8V process will have higher gain in absolute terms (it might take a change of only 0.8V to go from off to on), but it's much lower in relative terms (0.8V is 44% of
1.8V). Subthreshold leakage, in very high density, low voltage processes (Vdd ~ 1V) occurs when it doesn't even turn off completely, because there simply isn't enough voltage available to turn it off. (That, and the structures are so small, current just leaks right on through by tunneling..)
Tim
--
Deep Friar: a very philosophical monk.
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"o pere o" wrote in message
news:jkv9am$k2e$1@dont-email.me...
> This is a basic question on CMOS processes. Given a fabrication process
> that is labellled as "1.8V process", is it possible / advisable / etc to
> have a design work at _lower_ voltages? If simulations, for instance at
> 1.2V show up OK, is there any risk?
>
> Pere