Circuit to Multiply Voltages and Divide Voltages

You'll probably get several responses suggesting an A/D and a processor, which will be low cost and work well in most cases. Your calculation is commonly required with quadrant photodiode detectors. Where small signals (as low a one ppm) and high speed (to 500kHz, etc.) are involved, the A-D + uP approach may not be the best approach. Fifteen years ago I designed a quad preamp and normalizing amplifier with the above performance specs, which worked very well and has been an important component in several "world's first" experiments. Since then we've made more than 30 for various labs worldwide (model RIS-86 + RIS-271, $3k per set).

I used Burr-Brown INA105 instrumentation amplifiers (with a 10-t pot +/-2% nulling scheme) for the final difference function, and Barrie Gilbert's excellent Analog Devices AD734 multiplier for division. And Aromat TN2E relays for critical signal switching.

Obviously we can convert this to:

(X - Y) / (X + Y)

Is X always greater than Y?

What range does (X + Y) cover?

Do you want a digital result?

How good of a result do you need and how fast?

If you don't mind slow, we could do this with a 555 or two and an op-amp.

A PIC can do it with limitations.

You may be able to put (X+Y) on the reference of an ADC and (Y-X) in its input and do it all in one step.

There are quite a few multiplier/divider parts on the market. The good ones aren't cheap and the cheap ones aren't good. The CA3080 can be used as a multiplier but there is a 2:1 calibration issue with its gain.

Depending on where A, B, C, and D come from, you may be better off looking back one stage. If they are developed from AC signals, you may be able to use one of the pulse methods of doing it without loss of signal quality.

Below is a sketch of a straight line realisation of the desired calculation. All four opamps have their +ve inputs to 0v so I haven't bothered to draw them. M is a 4-quadrant analogue multiplier. The (rough) resistor ratios are based on 0.3V inputs.

V1 C? A---[R]---+---[10R]--+--+--------[R1]---+---||---+--Vout | | | | | | | | | | | | B---[R]---+---|->----+ | +-[R2]---+---|->--+ | |/ | | |/ | | | | | +---[10R]--+ | | +--------+ | | | | |XY X|---+ C---[R]---+---[10R]--+ | V2+----|-- M | | | | |10 Y|---+ | | | | +--------+ | D---[R]---+---|->----+ | | |/ | | +15V----[140R]-----+ | | | | +--[20R]---+---[10R]-----+ V3 | | _|_ | | D1/_ | | | | +-----[10R]---+---|->-------+ | |/ | | D2 | +----|>|------+

V1 = -10[(A+B)-(C+D)], and V3 = +5(A+B+C+D).

V2 = Vout*V3/10, and the integrator forces V1/R1 = V2/R2.

R2 [(A+B)-(C+D)] So Vout = 20.--.------------- R1 (A+B+C+D)

Vout (and V3) should be scaled to swing several volts to give the analogue multiplier reasonable XY inputs.

The divider becomes increasingly unstable as the Y input approaches zero and locks up for Y = negative. So D1, D2 and the 140R prevent V3 from going below about 100mV. The voltage on D2 cathode could go to a (0v-referenced) comparator to signal "(A+B+C+D) is too low".

Note; If the output is to go to an ADC then the multplier can be discarded and the division done by a 4-quadrant ADC's conversion to ADC-count = MAX-count * Vin/Vref, with V3 being used as Vref.

Note2; I think I'd prefer to regulate (A+B+C+D), either as an actual adjustment of the stimulus or as an AGC of the (A+B+C+D) signal. In either case multiply [(A+B)-(C+D)] by the (A+B+C+D) control voltage.