Boosted half-bridge

Hi,

I needed some 10W of 200+kHz 50% bipolar square wave for driving a bunch of magamps in one of my devices. The input voltage is 9.6V, so a full bridge looked like an obvious choice, as the half bridge configuration would allow for half the voltage swing. But I didn't like the complexity, so I came up with the following HB with integrated synchronous current-fed boost converter. One personality of the transistors produces 2xV_IN at the upper drain with appreciable current capacity, which might be used for free somewhere else in the device. The other personality is a regular HB, but with double the swing of a regular one. It is equivalent to a FB with half the complexity. The essential part is captured by the attached sim, but prototypes confirming its properties have successfully been built both using silicon and GaN parts. I believe some of you might find it interesting.

Best regards, Piotr

Version 4 SHEET 1 1232 680 WIRE 496 -176 192 -176 WIRE 192 -80 192 -176 WIRE 496 -64 496 -176 WIRE 48 0 0 0 WIRE 144 0 128 0 WIRE 0 16 0 0 WIRE -240 112 -304 112 WIRE -128 112 -160 112 WIRE 0 112 0 96 WIRE 0 112 -48 112 WIRE 192 112 192 16 WIRE 192 112 0 112 WIRE 224 112 192 112 WIRE 336 112 304 112 WIRE 496 112 496 0 WIRE 496 112 416 112 WIRE -304 128 -304 112 WIRE 720 160 720 112 WIRE 912 160 720 160 WIRE 192 192 192 112 WIRE 720 192 720 160 WIRE 912 192 912 160 WIRE 496 208 496 112 WIRE -304 224 -304 208 WIRE 48 272 0 272 WIRE 144 272 128 272 WIRE 0 288 0 272 WIRE 192 304 192 288 WIRE 496 304 496 272 WIRE 720 304 720 272 WIRE 912 304 912 272 WIRE 0 384 0 368 FLAG 192 304 0 FLAG -304 224 0 FLAG 496 304 0 FLAG 0 384 0 FLAG 720 304 0 FLAG 912 304 0 FLAG 720 112 V_SEC SYMBOL nmos 144 -80 R0 SYMATTR InstName M2 SYMATTR Value BSC100N03LS SYMBOL res -144 96 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R1 SYMATTR Value 1m SYMBOL voltage -304 112 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value {V_IN} SYMBOL ind -144 128 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 5 56 VBottom 2 SYMATTR InstName L1 SYMATTR Value {L_BOOST} SYMBOL cap 480 -64 R0 SYMATTR InstName C1 SYMATTR Value {C_HB} SYMBOL cap 480 208 R0 SYMATTR InstName C2 SYMATTR Value {C_HB} SYMBOL nmos 144 192 R0 SYMATTR InstName M1 SYMATTR Value BSC100N03LS SYMBOL voltage 0 272 R0 WINDOW 0 -53 5 Left 2 WINDOW 3 36 227 Left 2 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V2 SYMATTR Value PULSE(0 {V_GATE_ON} 0 {T_RISE} {T_FALL} {T_ON} {T_PERIOD}) SYMBOL res 144 256 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 -55 68 VTop 2 SYMATTR InstName R2 SYMATTR Value {R_GATE} SYMBOL voltage 0 0 R0 WINDOW 0 -41 -15 Left 2 WINDOW 3 35 457 Left 2 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V3 SYMATTR Value PULSE(0 {V_GATE_ON} {T_PERIOD/2} {T_RISE} {T_FALL} {T_ON} {T_PERIOD}) SYMBOL res 144 -16 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 -53 67 VTop 2 SYMATTR InstName R3 SYMATTR Value {R_GATE} SYMBOL ind 208 128 R270 WINDOW 0 34 27 VTop 2 WINDOW 3 89 69 VBottom 2 SYMATTR InstName L2 SYMATTR Value {LK_PRI} SYMBOL ind2 320 128 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 88 100 VBottom 2 SYMATTR InstName L3 SYMATTR Value {LM_PRI} SYMATTR Type ind SYMBOL ind2 736 176 M0 WINDOW 0 -34 44 Left 2 WINDOW 3 -124 77 Left 2 SYMATTR InstName L4 SYMATTR Value {LM_SEC} SYMATTR Type ind SYMBOL res 896 176 R0 SYMATTR InstName R4 SYMATTR Value 100 TEXT 240 -496 Left 2 !.param C_HB=22u TEXT 240 -432 Left 2 !.param F_OSC=300k TEXT 240 -400 Left 2 !.param T_PERIOD={1/F_OSC} TEXT 240 -368 Left 2 !.param T_DEAD=50n TEXT 240 -336 Left 2 !.param T_RISE=10n TEXT 240 -304 Left 2 !.param T_FALL=10n TEXT 240 -272 Left 2 !.param T_ON={T_PERIOD/2 - T_DEAD} TEXT -10 536 Left 2 !.tran 10m TEXT 240 -528 Left 2 !.param L_BOOST=22u TEXT 240 -240 Left 2 !.param V_GATE_ON=10V TEXT 240 -464 Left 2 !.param R_GATE=1 TEXT -16 456 Left 2 ;V3= TEXT -16 496 Left 2 ;V2= TEXT 736 -376 Left 2 !.param LK_PRI=5u TEXT 736 -536 Left 2 !.param N_PRI=12 TEXT 736 -472 Left 2 !.param AL=5000 TEXT 736 -440 Left 2 !.param LM_PRI={N_PRI*N_PRI*AL/1e9} TEXT 736 -408 Left 2 !.param LM_SEC={N_SEC*N_SEC*AL/1e9} TEXT 736 -504 Left 2 !.param N_SEC=12 TEXT 528 136 Left 2 !K1 L3 L4 1 TEXT 240 -560 Left 2 !.param V_IN=9

Reply to
Piotr Wyderski
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Impedance matching is what the transformer does, without any added complexity.

RL

Reply to
legg

Thanks Piotr, yes that is indeed interesting!

piglet

Reply to
piglet

I didn't pull up the schematic, but what is special about this design that is not available in bridge driver chips? I had looked at a number for a project and found no shortage of devices available. I'm thinking it might be the frequency range. A number of devices I considered would not work at 200 kHz. Are there none?

Reply to
Rick C

MOSFET drivers? They are designed for short current pulses and their steady load capabilities are pretty mediocre, if specified at all. They are good for 1-2W, e.g. IR21531 with the gate drivers used as a full-bride power stage. Motor driver chips do have the necessary current ratings, but are typically quite slow and often BJT-based.

This circuit has double the HB voltage swing while the complexity is that of a HB. There is an inductor at the input, so it shares a number of features with current-fed topologies. E.g. dI/dt is naturally limited in the overload scenario, hence the overcurrent protection can be slow and cheap. You also get high-capacity 2*VIN to use elsewhere for free, as it is a synchronous boost too, depends on how you look at it. Ideal for powering a class-D 15W audio amplifier in my application -- one dedicated boost less. The savings are not only in the circuit itself, but can be around it as well.

And it is interesting on its own for purely theoretical reasons; I have never seen this topology before. It can be generalised to AHB, but I need 50% duty cycle here.

Best regards, Piotr

Reply to
Piotr Wyderski

I think you missed my point. The driver chips can be used to drive the FETs with a minimum parts count providing high currents at a low cost.

Any number of the driver chips provide a boost output that is developed to drive the gates of N-FETs. Is that not similar to what you are talking about?

Ok, fair enough.

Reply to
Rick C

I think it still requires the isolated HB driver, yes/no ?

You'd get a simpler circuit by changing the turns ratio in the transformer and using an unmodified HB.

While a 50/50 duty cycle is a fine concept, it doesn't just occur naturally. Your circuit, as with a standard HB, depends on capacitive coupling to generate volt-second balancing.

Once upon a time there might have been a justifiable reason to artificially boost primary voltages - switch and cap current capabilities being the primary bugbears - but that's no longer justified by the parts budget, especially at low power.

Do you need an isolated output? Using this topology to drop the need for a transformer might be a selling point, if not.

RL

Reply to
legg

don't know if this link will work unless you're logged into the LTSpice forum.

formatting link
RL

Reply to
legg

It requires a driver, but a regular low/high side one. Like every other HB.

Voltage swing is too low in low-V_IN scenarios, making the number of primary winding turns a nuisance. This self-boosting capability fixes that. I need to make several pairs of isolated +18V floating supplies for SiC HB-s and drive a number of HF magamps. Lots of primaries to be connected in parallel and powered from this bridge.

This 50/50 is for magamps.

That is correct. This still is a HB, so all the usual rules apply.

Higher voltage lowers the turns ratio and helps with leakage issues. I^2*R losses are lower as well.

Many, with very low capacitive couplings between them.

Best regards, Piotr

Reply to
Piotr Wyderski

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