BJT electrothermal modelling using LTSpice

Hi, I am trying to model a TO-92 transistor (2N4401) to see what effects "thermal memory" have on its behaviour at medium signal levels. From digging around, I was able to make up a circuit that corrects for the Vbe temperature coefficient. The circuit calulates transistor power dissipation, converts that to current, and applies it to an RC (Foster) network that represents the thermal resistance and time constants of the transistor die, case and air cooling. That calculates the instantaneous temperature, which is then applied to a voltage in series to the base (0.0022 v/deg C). The temperature simulation seems reasonably close to the response of a TO-92 transistor (2N7000 used as reference). I don't know enough about transistor theory.... so I have a few questions if anyone has done this stuff before:

1) will this model beta variation with die temperature? 2) if not, is there a decent way to do it? 3) are there any refinements to this method to get a better approximation to real behaviour?

Here is my LTSpice circuit:

Version 4 SHEET 1 988 712 WIRE 928 -160 208 -160 WIRE 608 -48 112 -48 WIRE 608 48 608 -48 WIRE 608 48 480 48 WIRE 720 48 608 48 WIRE 416 64 336 64 WIRE 480 64 480 48 WIRE 608 64 608 48 WIRE 720 64 720 48 WIRE 336 80 336 64 WIRE 416 80 416 64 WIRE 208 96 208 -80 WIRE 288 96 208 96 WIRE 64 112 32 112 WIRE 928 112 928 -160 WIRE 32 128 32 112 WIRE 64 128 64 112 WIRE 112 128 112 -48 WIRE 208 128 208 96 WIRE 416 160 336 160 WIRE 608 160 608 144 WIRE 720 160 720 128 WIRE 720 160 608 160 WIRE -144 176 -208 176 WIRE 48 176 -64 176 WIRE 144 176 128 176 WIRE 336 176 336 160 WIRE 480 176 480 144 WIRE -208 224 -208 176 WIRE 416 224 336 224 WIRE 208 240 208 224 WIRE 288 240 288 144 WIRE 288 240 208 240 WIRE 336 240 336 224 WIRE 288 256 288 240 WIRE 416 256 416 224 WIRE 608 272 608 240 WIRE 720 272 720 224 WIRE 720 272 608 272 WIRE 608 288 608 272 WIRE 208 336 208 320 WIRE 288 336 288 304 WIRE 288 336 208 336 WIRE 336 336 336 320 WIRE 416 336 336 336 WIRE 336 352 336 336 WIRE 608 400 608 368 WIRE 928 464 928 192 WIRE 928 464 608 464 WIRE 608 496 608 464 WIRE -208 544 -208 304 WIRE 208 544 208 336 WIRE 208 544 -208 544 WIRE 208 560 208 544 FLAG 608 496 0 FLAG 336 176 0 FLAG 336 352 0 FLAG 480 176 0 FLAG 32 128 0 FLAG 608 400 0 FLAG 720 336 0 FLAG 208 560 0 SYMBOL npn 144 128 R0 SYMATTR InstName Q1 SYMATTR Value 2N4401 SYMBOL res 192 224 R0 SYMATTR InstName R1 SYMATTR Value .01 SYMBOL res 192 -176 R0 SYMATTR InstName R2 SYMATTR Value 20 SYMBOL voltage 928 96 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value 10 SYMBOL voltage -208 208 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 WINDOW 3 -291 56 Left 0 SYMATTR Value PULSE(0 10 0 0 0 100 0 1) SYMATTR InstName V2 SYMBOL res 400 240 R0 SYMATTR InstName R3 SYMATTR Value 1 SYMBOL g 336 224 R0 WINDOW 3 24 44 Left 0 SYMATTR Value 100 SYMATTR InstName G1 SYMBOL g 336 64 R0 SYMATTR InstName G2 SYMATTR Value 1 SYMBOL res 400 64 R0 SYMATTR InstName R6 SYMATTR Value 1 SYMBOL bi 480 64 R0 WINDOW 3 -53 88 Left 0 SYMATTR Value I=-v(n003)*V(n009) SYMATTR InstName B1 SYMBOL res 592 48 R0 SYMATTR InstName R8 SYMATTR Value 50 SYMBOL cap 736 128 R180 WINDOW 0 24 64 Left 0 WINDOW 3 24 8 Left 0 SYMATTR InstName C2 SYMATTR Value .0002 SYMBOL res 592 144 R0 SYMATTR InstName R9 SYMATTR Value 50 SYMBOL cap 736 224 R180 WINDOW 0 24 64 Left 0 WINDOW 3 24 8 Left 0 SYMATTR InstName C3 SYMATTR Value .002 SYMBOL e 144 176 R90 SYMATTR InstName E1 SYMATTR Value .0022 SYMBOL res 592 272 R0 SYMATTR InstName R10 SYMATTR Value 300 SYMBOL cap 704 272 R0 SYMATTR InstName C4 SYMATTR Value .07 SYMBOL res -48 160 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R4 SYMATTR Value 4000 TEXT -152 496 Left 0 !.tran 0 100 0 200u TEXT 616 24 Left 0 ;junction temp. TEXT 432 224 Left 0 ;emitter\ncurrent TEXT 336 16 Left 0 ;collector\nvoltage TEXT 480 32 Left 0 ;i=power TEXT 216 408 Left 0 ;emitter TEXT 216 -16 Left 0 ;collector TEXT -56 152 Left 0 ;base TEXT 0 88 Left 0 ;Vbe correction TEXT 632 400 Left 0 ;ambient TEXT -208 600 Left 0 ;2N4401 modified for self heating. Power is calculated as current at B1, temperature is \ncalculated from Foster type RC network. Transient response of temperature is\nwithin 20% from

1ms-100s.

(watch out for the long lines that might be wrapped by your newsreader)

Paul G.

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Paul G.
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2N7000 is a mosfet.

I make a few products that have a uP that measures power mosfet current and voltage drop, and heatsink temperature, and calculates/simulates junction tempearture in real time. The sims run about 2000 times per second. The intent is to shut down when the junctions get too hot, not to model transfer behavior or anything like that.

I use a simple 1st order thermal time constant, usually in the 100 millisecond range, and that seems to work. If you want to model Vbe accurately, you'll need a more complex thermal model.

Can't LT Spice poke computed temperature into a transistor model somehow?

John

Reply to
John Larkin

True.... but I figure the thermal characteristics should be similiar (TO-92). The die size is probably different, but I'm not at the stage where I need perfect accuracy. There are also thermal models around for some power transistors, I'm sure it would be handy to be able to model their behaviour as they heat up.

The temperature model seems reasonable over 1ms - 100sec. My problem is that I don't know how to compensate beta variation with temperature (approx .5%/deg-C). The small signal emitter resistance "re" (.025/Ie) where KT/Q=.025 is also affected, and I don't want to build up an entirely new transistor model to replace the Gummel-Poon Spice model. The idea was to add a few compensations like the simple Vbe correction, to allow the existing Spice model to simulate transistor self-heating effects. I see a lot of references to just that in RF output transistors, but it seems like all those papers cost a fair bit, and its hard to tell if they'll end up being just a lot of academic jibber-jabber. Many of them obsess over the die layout and the thermal model, and otherwise try to build up a complete new transistor model.

I'm not sure about that.... there is an ".OPTIONS temp xxx" where you can set temperature, but I think its a global setting, and that would cause all the transistors in the circuit to be affected the same. On the other hand maybe its possible to copy the entire model over to a new one, and add the necessary compensation. Have you ever done something like that?

Reply to
Paul G.

"Paul G." schrieb im Newsbeitrag news: snipped-for-privacy@4ax.com...

Hello Paul,

The transistor parameters of the standrad BJT model are static. They are the same for the whole simulation. LTspice offers a second BJT model named VBIC. This VBIC model could include self heating, but exactly this feature is not implemented in LTspice.

Best regards, Helmut

--- From the LTspice help VBIC Capabilities compared to Standard Gummel-Poon Model o Integrated Substrate transistor for parasitic devices in integrated processes o Weak avalanche and Base-emitter breakdown model o Improved Early Effect modeling o Physical separation of Ic and Ib o Improved Depletion capacitance model o Improved temperature modeling o Self-heating modeling (not in this version)

Reply to
Helmut Sennewald

You would think that linear IC designers would care a lot about local on-chip heating. Maybe Linear has a private version.

In most circuits, modeling Vbe vs temp would be sufficient, and that can be done fairly easily, as Paul is doing. The thermal time constants are the tricky part, best done by imagining the various masses and lags and tweaking the numbers to match a real part.

Here's a UPA800 dual transistor with 80 milliwatts dissipated on one side

ftp://jjlarkin.lmi.net/UPA800_80mW_one-side.jpg

(hardly any better that two separate transistors)

and here is Vbe, essentially temperature, of one transistor when the other is pulsed.

ftp://jjlarkin.lmi.net/UPA800_Slow_Xtalk_500uv.JPG

You can time-share a single transistor to dissipate power and measure its own junction temperature, which helps estimate the thermal time constants.

John

Reply to
John Larkin

[snip]

If you've managed to model transient temperature, use it to control a GVALUE behavioral device to emulate beta effects. (Not that I think it will matter, PROVIDED you're not into "suicide bias" schemes.) ...Jim Thompson

[On the Road, in New York]
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| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
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Reply to
Jim Thompson

I couldn't figure out how to do it with a GVALUE, since that would introduce a temperature varying bias current. The Hfe tempco is between .005-.10% /deg C from the 2N4401 datasheets. The other h parameters are specified for tempco, but I'm not sure if I really need them. I tried a behavioural current source (BI) and placed it between collector and emitter, and set the value to (collector-current * .005

  • temp-rise) such that it adds to the collector current at higher temperatures. So far it seems to work, I have to mess around with it to check its behaviour. The current measured does not include the compensation current.... otherwise things could get strange (although nothing really odd happened in simulation).

Paul G.

Reply to
Paul G.

Interesting problem. I'll play with it if I get a chance. Typical usage would have collector current forced by the feedback in the application, so GVALUE should subtract apparent BASE current based on collector current. ...Jim Thompson

[On the Road, in New York]
--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

Thermal modeling can be tricky. While the transistor model itself may (depending on the model and model creator) contain the thermal variation of various parameters, there's usually no way to influence the temperature of an individual transistor with many publicly-available simulation models. The original SPICE assumed that all devices were at the same temperature, an assumption that still holds in most simulators. The VBIC and Mextram models (and some others) support transistor self- heating, but not a lot of commercial simulators support VBIC or Mextram. Model extraction for Mextram is a real bear as there are many more parameters than in the standard Gummel- Poon model upon which SPICE was originally based, and not enough new work is being done with bipolar transistors these days for the few remaining manufacturers to bother with the necessary model extraction and support (except by folks who manufacture linear ICs and have the motivation and wherewithal to support the necessary development).

Your method will work for Vbe modeling. I'm not sure it's worth the trouble to flog it into capturing beta variation. Typically transistors have a pretty wide beta variation to begin with, so a circuit will normally be designed to be extremely *insensitive* to it. IMO a circuit that depends on beta is a non-robust design.

And yes, IC designers care a lot about on-chip heating. But what really matters is differential heating, where local dissipation causes individual transistors to have different temperatures. Since most SPICE-like simulators assume all transistors are at equal temps, this can lead to extremely bogus simulation results. This is important when using junction-isolated processes, and absolutely critical with dielectric isolation where the self-heating for small devices can be thousands of degrees per watt, so even milliwatts can be significant. I can't speak for Linear Tech, but yes, this is something I've had to take into account during my own career.

Steve

Reply to
Stephan Goldstein

I realize that any half decent circuit will take into account variations in beta. My problem is what happens under fairly large signal conditions when the die temperature starts to follow the various signals. Take the situation where there is a low frequency, and a high one. The die temperature will vary with the low frequency, which will modulate the higher frequency. I'm trying to get a handle on how significant that is compared to the inherant non-linearity of the device. So far as I can tell, the thermal modulation effects in non-switching, or class "A" operating conditions are small compared to isothermal device non-linearities. Just how small is what I'd like to investigate. I would like to model a differential amp, and see its behaviour under overload conditions - probably replicating some of the work done by oscilloscope makers. They went to considerable pain to avoid gain and bias shifts due to wildly changing signal levels.

Yep.... I see a huge number of papers dealing with the problems of modelling IC's and RF power amplifiers, and dealing with multiple or paralleled devices. That stuff seems to be way over my head....

-Paul G.

Reply to
Paul G.

Not quite, but close

Mirror transistor collector current and add accordingly to a linear equation: zero at 25C, x1 at 125C

...Jim Thompson

[On the Road, in New York]
--
| James E.Thompson, CTO                            |    mens     |
| Analog Innovations, Inc.                         |     et      |
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    |
| Phoenix, Arizona  85048    Skype: Contacts Only  |             |
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  |
| E-mail Icon at http://www.analog-innovations.com |    1962     |
             
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

On Sun, 07 Aug 2011 17:43:25 -0400, Jim Thompson wrote:

I tried a number of configurations... the best seemed to be a current source (LTSpice behavioural source "BI") that was equal to

0.0033 * temperature-rise * collector current, and placed between collector and emitter. I originally went with 0.006 instead of .0033, based on graphs of Hfe variation vs. temperature for a 2N4400. However, when I compared the performance of my modelled hot transistors vs LTSpice's transistor at the same temperature (using ".options temp xx" to set global temp), the operating points and AC gain were quite different. By trial-and-error I got the value of 0.0033 which then gives pretty much the same thermal behaviour as the normal LTSpice Gummel-Poon model. I was trying to isolate the effect of die temperature on non-linearity, as compared to the non-thermal sources of non-linearity. It appears that for class A operation, and throughout the audio range, thermal effects on IM distortion are at least 30-40 db below distortion caused in an isothermal situation. For large signals below .01 Hz, the non-linearity (and die temperature variation) can get quite bad. One of the things you can show is the rule of setting the operating point so 1/2 of the supply is across the load. That minimizes the temperature die swing. You can prove that by writing up the equations for power in the collector, and solving for when the derivative of power vs current is zero. At that condition, any signal will reduce the transistor power. You can take advantage of that in a differential amp to reduce thermal effects. Frequency effects of a 2N4400 transistor running hard at 100 deg c 100 ohm load, 10V supply, saturation to cutoff: signal freq (Hz) die temp swing .001 80 .01 50 .1 25 1 15 10 10 100 6 1000 2 10000 .3 As the signal is reduced, so will the temperature variation change. Using the above model, I can vary the die temperature without changing any other parameters - something that is physically difficult to do, especially at audio or higher frequencies. I have thermally modelled the 2N4400 from the 2N7000 - they both are in TO-92 packages. The 2N7000 is the only TO-92 device I know that has extensive thermal characteristics published. Here is a test circuit in Spice using my model:

Version 4 SHEET 1 988 712 WIRE 208 -160 -48 -160 WIRE 928 -160 208 -160 WIRE 608 -48 112 -48 WIRE 656 -48 608 -48 WIRE 608 48 608 -48 WIRE 608 48 480 48 WIRE 720 48 608 48 WIRE 336 64 320 64 WIRE 416 64 336 64 WIRE 480 64 480 48 WIRE 608 64 608 48 WIRE 720 64 720 48 WIRE 336 80 336 64 WIRE 416 80 416 64 WIRE 208 96 208 -80 WIRE 240 96 208 96 WIRE 288 96 240 96 WIRE 64 112 32 112 WIRE 928 112 928 -160 WIRE 32 128 32 112 WIRE 64 128 64 112 WIRE 112 128 112 -48 WIRE 208 128 208 96 WIRE 240 128 240 96 WIRE 416 160 336 160 WIRE 608 160 608 144 WIRE 720 160 720 128 WIRE 720 160 608 160 WIRE -48 176 -48 -80 WIRE -48 176 -64 176 WIRE 48 176 -48 176 WIRE 144 176 128 176 WIRE 336 176 336 160 WIRE 480 176 480 144 WIRE 608 176 608 160 WIRE 720 176 720 160 WIRE -208 224 -208 176 WIRE 336 224 320 224 WIRE 416 224 336 224 WIRE 208 240 208 224 WIRE 240 240 240 208 WIRE 240 240 208 240 WIRE 288 240 288 144 WIRE 288 240 240 240 WIRE 336 240 336 224 WIRE -48 256 -48 176 WIRE 288 256 288 240 WIRE 416 256 416 224 WIRE 608 272 608 256 WIRE 720 272 720 240 WIRE 720 272 608 272 WIRE 208 336 208 320 WIRE 288 336 288 304 WIRE 288 336 208 336 WIRE 336 336 336 320 WIRE 416 336 336 336 WIRE 336 352 336 336 WIRE 608 384 608 352 WIRE 720 384 720 336 WIRE 720 384 608 384 WIRE 608 400 608 384 WIRE 928 464 928 192 WIRE 608 512 608 480 WIRE -208 544 -208 384 WIRE -48 544 -48 336 WIRE -48 544 -208 544 WIRE 208 544 208 336 WIRE 208 544 -48 544 WIRE 208 560 208 544 FLAG 928 464 0 FLAG 336 176 0 FLAG 336 352 0 FLAG 480 176 0 FLAG 32 128 0 FLAG 608 512 0 FLAG 720 448 0 FLAG 208 560 0 FLAG 320 64 vq1 FLAG 320 224 iq1 FLAG 656 -48 tempq1 SYMBOL npn 144 128 R0 SYMATTR InstName Q1 SYMATTR Value 2N4401 SYMBOL res 192 224 R0 SYMATTR InstName R1 SYMATTR Value .01 SYMBOL res 192 -176 R0 SYMATTR InstName R2 SYMATTR Value 100 SYMBOL voltage 928 96 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 SYMATTR InstName V1 SYMATTR Value 10 SYMBOL voltage -208 208 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 WINDOW 3 -291 56 Left 0 SYMATTR Value SINE(0 .5 1000 0 0 0 10000000) SYMATTR InstName V2 SYMBOL res 400 240 R0 SYMATTR InstName R3 SYMATTR Value 1 SYMBOL g 336 224 R0 WINDOW 3 24 44 Left 0 SYMATTR Value 100 SYMATTR InstName G1 SYMBOL g 336 64 R0 SYMATTR InstName G2 SYMATTR Value 1 SYMBOL res 400 64 R0 SYMATTR InstName R6 SYMATTR Value 1 SYMBOL bi 480 64 R0 WINDOW 3 -53 88 Left 0 SYMATTR Value I=-V(vq1)*V(iq1) SYMATTR InstName B1 SYMBOL res 592 160 R0 SYMATTR InstName R8 SYMATTR Value 30 SYMBOL cap 736 240 R180 WINDOW 0 24 64 Left 0 WINDOW 3 24 8 Left 0 SYMATTR InstName C2 SYMATTR Value 50µ SYMBOL res 592 256 R0 SYMATTR InstName R9 SYMATTR Value 50 SYMBOL cap 736 336 R180 WINDOW 0 24 64 Left 0 WINDOW 3 24 8 Left 0 SYMATTR InstName C3 SYMATTR Value 2000µ SYMBOL e 144 176 R90 SYMATTR InstName E1 SYMATTR Value .0022 SYMBOL res 592 384 R0 SYMATTR InstName R10 SYMATTR Value 250 SYMBOL cap 704 384 R0 SYMATTR InstName C4 SYMATTR Value .07 SYMBOL res -112 160 R90 WINDOW 0 0 56 VBottom 0 WINDOW 3 32 56 VTop 0 SYMATTR InstName R4 SYMATTR Value 10k SYMBOL bi 240 128 R0 SYMATTR InstName B2 SYMATTR Value I=V(iq1)*.0033*V(tempq1) SYMBOL voltage -208 288 R0 WINDOW 123 0 0 Left 0 WINDOW 39 0 0 Left 0 WINDOW 3 -291 56 Left 0 SYMATTR Value SINE(0 .5 10 0 0 0 100) SYMATTR InstName V3 SYMBOL cap -64 160 R90 WINDOW 0 0 32 VBottom 0 WINDOW 3 32 32 VTop 0 SYMATTR InstName C1 SYMATTR Value 10 SYMBOL res -64 -176 R0 SYMATTR InstName R5 SYMATTR Value 45k SYMBOL res -64 240 R0 SYMATTR InstName R7 SYMATTR Value 10k SYMBOL res 592 48 R0 SYMATTR InstName R11 SYMATTR Value 7 SYMBOL cap 704 64 R0 SYMATTR InstName C5 SYMATTR Value 10µ TEXT -152 496 Left 0 !.tran 0 10 0 10u TEXT 480 32 Left 0 ;i=power TEXT 216 408 Left 0 ;emitter TEXT 216 -16 Left 0 ;collector TEXT -40 152 Left 0 ;base TEXT 0 88 Left 0 ;Vbe correction TEXT 632 512 Left 0 ;ambient TEXT -208 600 Left 0 ;2N4401 modified for self heating. Power is calculated as current at B1, temperature is \ncalculated from Foster type RC network. Transient response of temperature is\nwithin 20% from

0.1ms-100s. TEXT -152 456 Left 0 !.options plotwinsize 0 TEXT -144 424 Left 0 !.options temp 27

Paul G.

Reply to
Paul G.

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