The '7007s is actually the same die as the (nominally larger) '7010. They use fuses to disable one of the ARM cores, and it's only possible to access about 70% of the FPGA fabric. This limitation is actually enforced by the development software; the chip has 100% of the FPGA fabric present (and tested). The FPGA bitstream header contains an identifying code though, which stops you from building a binary for the '7010 and loading it into the '7007s. The upside is that you can fully utilise "100%" of the '7007s fabric without running into problems (as "100%" is really only about 70% of the fabric, which is a fairly modest utilisation).
Other Xilinx Zynq-7 chips nobbled this way: '7020 => '7014S '7015 => '7012S
More recent families (e.g. Ultrascale Plus) do a similar thing, e.g. XCVU5P and XCVU7P have the same pair of dies but very different prices.
Regards, Allan