Better transistor test jig for SPICE

Jan 31, 2011 16 Replies

(Posted to ABSE on Friday, but I figure there's a bigger audience here these days...)



The drawing here:

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... shows a trivial "test jig" for a BJT that just provides a DC bias so that I can then poke around and look at various small-signal AC parameters (e.g., the port parameters, Gmax, noise/gain contours, etc.). The DC bias is set by adjusting the voltage on the lower voltage source (...ending up with Ic ~= (V-0.7)/100, of course).



Is there a better way to do this?



I'd really like to just stick a constant current source in the collector, but the tricky bit is then to properly drive the base. Is there some simple solution to that?



At times in the past I've done something along the lines of using a high-gain voltage-controlled voltage source with negative feedback to effectively make a crude op-amp that drives the base to whatever it needs to be to get the collector current (measured through a tiny shunt resistor) to be prescribed, but somehow that seems like overkill.



Thanks,



---Joel



Why not bias the emitter with a high resistance to a large negative voltage, like 2400 ohms and -12V? Hold the base at 0VDC, put in a healthy emitter bypass cap, and away you go.

Tim Wescott Wescott Design Services http://www.wescottdesign.com Do you need to implement control loops in software? "Applied Control Theory for Embedded Systems" was written for you. See details at http://www.wescottdesign.com/actfes/actfes.html

On a sunny day (Mon, 31 Jan 2011 09:02:07 -0800) it happened "Joel Koltner" wrote in :

Nice. Many years ago when it was not busy, boss told me make something to measure transistors. I designed a nice curve tracer, pulsed, so you did not exceed Pmax. I used relays... And a lot of semi-conductors, a x y output for the scope, NPN PNP selector, potmeters, switches. Something like that could be added to this.

All that said: I only used it once or twice. And these days we have data-sheets, unless you are at the edge of what it can do, as J.Larkin sometimes does, there is not a really big need. And if there is, then every circuit is different.

Just feed the emitter with a current source, and maybe also bias the base with a rough 700mV so that the bias point is as close as possible to the real value.

Thanks, Fred.

Yep. That's the way to do it.

Bypass to ground goes below L1.

Or use an adjustable current source in the emitter path (below L1, and add some series R to the bypass cap). ...Jim Thompson

| James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | Remember: Once you go over the hill, you pick up speed

Hi Jan,

I have a kit for Tom Gootee's curve tracer

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that I'm a little embarassed to admit I've never put together!

The problem with data sheets is that they can only give you plots of various parameters at a rather finite number of bias points. The next step up, of course, is the SPICE model... but even there, not all SPICE models will include, e.g., proper noise components, so you're sometimes still stuck with having to just measure the thing in the actual circuit.

---Joel

That does gets rid of one power supply:

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... good...

...and I can see now where I want to go... here's one with just a constant current source:

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It might be nice to be able to set the collector current rather than the emitter current in that one, but it's definitely a nice improvement over what I started with. That's probably about as good as it gets for "simple" approaches...

Thanks for the help,

---Joel

"Jim Thompson" wrote in message news: snipped-for-privacy@4ax.com...

This is what I ended up with:

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What's the series R to the bypass cap (C1) do? (Even in real circuits, I'll have an emitter resistor, but it's generally bypassed by just a single cap to ground.)

What DC bias do you normally keep your emitters at anyway when you're doing a

3.3V circuit? -- Since what matters for bias stability is the emitter voltage relative to Vbe, and in a 3.3V design I can't usually afford the 2-3V that one used to see in, e.g., 12V designs; at the moment I'm using ~1.5V.

Thanks,

---Joel

To replicate the real circuit while testing.

I bias everything primarily via mirrors, which you can't economically afford. ...Jim Thompson

| James E.Thompson, CTO | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona 85048 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at http://www.analog-innovations.com | 1962 | Remember: Once you go over the hill, you pick up speed

Joel Koltner a écrit :

If you really insist on having collector current set, then:

  • measure base current (use a 0V or 0.7V voltage source)
  • copy that into a voltage using a CCVS (H source)
  • heavily filter that 1F/1K RC
  • inject that current into the emitter, additionally to the (now) "collector current" current source...
Thanks, Fred.

Fred Bartoli a écrit :

... obviously using a VCCS (G source)

Thanks, Fred.

Hmm, I see. OK, definitely a bit too messy -- I'll live with setting emitter currents. :-)

I appreciate your knowledge here!

---Joel

Joel Koltner a écrit :

You can also, if you have a reasonable value for your transistor current gain, parametrize your current source:

.parameter beta=77 Ic=10m

Ie n1 n2 DC={Ic*(1+1/beta)}

Thanks, Fred.

do,

A similar assignment, but for linear pass element beta grading. T replace an old one that burned operator fingers.

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RL

Hi Fred,

Hmm, good idea...

This is the final circuit:

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... it's just a textbook CE amplifier for 244-286MHz with a designed gain of 15dB (using gain circles); the transistor is an NXP BFR92A. (This was all done just as an academic exercise to become familiar with the software...)

The real thing performs within a dB or so of the simulation, which I'm rather impressed by -- Measured results:

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, simulated results:
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(the measured results stop at ~20dB at ~130MHz as the circuit is going into compression at that point).

What it looks like in real life:

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While the circuit appears to function as designed, I'm all for suggestions as to how to improve its robustness.

---Joel

On a sunny day (Mon, 31 Jan 2011 16:04:18 -0500) it happened legg wrote in :

do,

Nice picture :-)

This might be interesting, bias point is selected with IC and VCE values:

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I translated that into SPICE netlist -you need to replace alias with proper values-:

*Y PARAM ANALYSIS .INCLUDE MODELFILE
  • Y11/YIE AND Y21/YFE CIRCUIT I10 11 10 AC 0.1M VAUX11 0 11 AC 0 V10 20 0 DC VCEVCE ; VCE VAUX10 20 30 DC 0 F10 0 40 VAUX10 1 ICSET10 40 0 DC ICICM ; IC R10 40 0 1MEG G10 0 10 40 0 1 G20 0 50 40 0 1 Q10 20 10 0 MODELNAME QTEST10 30 50 0 MODELNAME
  • Y12/YRE AND Y22/YOE CIRCUIT VOUT1 1 2 AC 1 V1 2 0 DC VCEVCE ; VCE VAUX1 2 3 DC 0 QTEST1 1 4 0 MODELNAME Q2 3 5 0 MODELNAME F1 6 0 VAUX1 1 ICSET1 0 6 DC ICICM ; IC R1 6 0 1MEG E1 4 0 6 0 1 E2 5 0 6 0 1 .OP .SAVE ALL .AC DEC POINTS FMINMEG FMAXMEG .PRINT AC (I(VAUX11)/V(10)) (-I(V10)/V(10)) (-I(VOUT1)/V(1,2)) (-I(E1)/V(1,2)) .END

Best Regards, M. Emmanuel

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