Beta degradation quantified?

Spehro, What don't you run controlled "jolts" of known energy and frequency, and it may likely be a function of VCE... and report back ?:-)

...Jim Thompson

A few zillion years ago I think I remember a paper that said that one cause of beta degradation of transistors was due to transient electrical overstress that did not kill the device but changed the distribution of dopants in some locations. Operating the device in the eb reverse breakdown region for extended periods could also do that.

Al

Could be. It's an item of faith around where I work that you can (mostly) cure Beta degradation by cooking the Transistor ~24 hours at (IIRC) 150 deg C.

Robert H.

Oh, tell the WHOLE story, whydontcha! There are diodes protecting the SN7400 with post-1972(?) datecodes, but before that, there was a different circuit for SN7400. It didn't have those diodes.

You can't get that part any more.

Diodes were added after a number of customers complained of parts dying. There were also some complaints when the circuit changed without any alteration of the part number, I hear. Old databooks say the 74L00 wasn't redesigned, so those parts lack clamp diodes on all datecodes...

It has been over 40 years since i saw his at Fairchild. What little i remember goes like this: Degradation is a function of time and reverse current, and should be put in terms of equivalent (radioactive) dose rate. That is to say, to get about the same degradation at double the time, then decrease the current by a factor of two. When you are done, take the affected units and cook them at 125C to

160C to anneal out the dsamage (ie restore the beta to original). I forget how long; maybe an hour or so.

There is some discussion of this effect in Motchenbacher & Fitchen, where the primary consideration is low-noise operation. IIRC they include graphs showing recovery versus anneal time. I don't remember the time-scales involved (my copy is on load to a colleague) but I think recovery was logarithmic in time, i.e. it took a long time to get back after damage caused by a quite-a-bit shorter time.

In my real-life job at ADI we are always careful to diode-protect devices against reverse Vbe breakdown, even in apps that normally run at high temps and for which beta is not critical. It's just good practice if you can afford it. Fortunately, one more small transistor on a large IC is basically free.

HTH,

Steve

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LOW CURRENT HFE DEGRADATION OF BIPOLAR TRANSISTOR DUE TO BASE EMTER REVERSE BIAS CARRIER INJECTION

One of the problems of the BIP Tr reliability is that hFE may decreases when a reverse bias stress is applied to the emitter-base PN-junction. hFE decreases dramatically when the emitter-base PN-junction reverse-direction-current (IEBO) generated by the emitter-base PN-junction reversedirection-voltage (VEB) is greater, or when the temperature is lower....[continues] [I told you so]

2) Mechanism of Instability

At the emitter-base junction, VEB generates hot carriers, and the interface state is formed in the emitter-base depletion layer of the interface between Si and SiO2. Then, the amount of surface recombination current increases 1) 2). As a result, the base current increases, which causes the decrease of hFE.

Figure 4-4-3 illustrates the result of a research on the impact of IEBO on hFE. According to this, hFE decreases when IEBO increases, and this is prominent in the low collector current area. One of the methods to recover hFE is to discharge carriers trapped by reverse bias, applying heat treatment. An example of hFE recovery with 24 hours of high temperature baking at 200°C is illustrated in Figure 4-4-4.

etc... and

1) Hori: hFE degradation phenomenon due to the emitter base reverse bias stress of the minute bipolar transistor. "Bisaika baipo-ra torangisuta no emitta · be-sugyakubaiasusutoresu ni yoru hFE genshyou," The Institute of Electronics, Information and Communication Engineers, R82-89, pp. 7-12 (1982) 2) Nishino: Influence given to hFE by the bipolar TrEB reverse bias. "Baipora TrEB gyaku baiasuno hFE niataeru eikyou," The Institute of Electronics, Information and Communication Engineers, R92-35, pp. 19-24 (1992)

Abstract : A summary on common emitter DC gain degradation phenomena on NPN transistors is given. The hFE degradation, with respect to non-bias temperature stress, reverse bias plus temperature stress, operating life stress, encapsulating ambient, surface contamination, surface coating, etc., is discussed. Also models for hFE degradation are presented. The reasons why the surface sensitive parameters are not closely correlated are discussed. Silicon p-n junction leakage current phenomena are analyzed utilizing observations made on nonoverlay oxide passivated PNP transistors, overlay high-frequency interdigitated PNP transistors, MOS field effect transistors and experiments conducted with special geometry n- or p-type diodes. A model for p-n junction leakage current which explains three types of currents, (1) bulk depletion layer generation current, (2) surface channel generation current and (3) direct channel conduction current, is presented. (Author) [may be dated]

hmmmm...

Tons of stuff out there, do your own research...

No to mention a 40 year old recollection is worthless and nothing is being "annealed," the baking is used to accelerate a diffusion mechanism and/or increase population of conduction band electrons such as they are. The problem is charges trapped in insulating material.

Those diodes were added to clamp transmission line effects and they were advertized as such. It had nothing to do with a number of customers complaining of parts dying, it had everything to do with simplifying layout.

Makes sense. Zenering a b-e junction is known to emit light, and anything that emits light destroys itself.

John

[snip] [snip]

Yep, I remember Ki Dong Kang. We were observing unexplained alternator regulator failures.

...Jim Thompson

-- | James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | |

| 1962 | America: Land of the Free, Because of the Brave

There's a technique called PICA that uses time-resolved imaging of (very dim) light emitted from FETs in processors to do failure analysis and power supply tolerancing. This summer I designed a small spectrometer for an intern who wanted to measure the emission spectrum using PICA.

Cheers,

Phil Hobbs

I've heard of that. The real limit is that the average switching event zots out far less than one average photon, so only sampling-scope type data can be collected, and that very slowly. Are you using an mcp or something behind the spectrometer?

John

Generally it's done by scanning, using a single-point detector such as a superconducting bolometer or PMT. I'm not a PICA expert, people just send me their summer students. ;)

Cheers,

Phil Hobbs

Since we know that hFE degradation is accompanied by a similar increase in IEBO, this probably means that transistors designed for inverse operation such as in chopper applications , like the MPS-A16/-A17, are impervious to the effect due to VEB stress shy of avalanche. ON no longer makes those, but they do have the MSD1328 with a VEBO of 12V, and it seems a bit more rugged too, available in small quantity from Mouser at low cost.

I guess Jim wasn't paying attention when he wrote that. Later 7400 series designs have clamp diodes to ground. However, Spehro was asking about clamp diodes to Vcc to keep the emitter inputs from breaking down. They can't be used because 7400 series parts have a maximum input spec of 5.5V regardless of Vcc.

However, I don't think gold doped parts such as 7400s suffer from much degradation. Maybe someone could test this with a 2N2369.