bandpass filter

Yep. It's called a PLL. See...

formatting link

Choose your flavor of output, sine or square. ...Jim Thompson

-- | James E.Thompson | mens | | Analog Innovations | et | | Analog/Mixed-Signal ASIC's and Discrete Systems | manus | | San Tan Valley, AZ 85142 Skype: Contacts Only | | | Voice:(480)460-2350 Fax: Available upon request | Brass Rat | | E-mail Icon at

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| 1962 | I love to cook with wine. Sometimes I even put it in the food.

Reply to
Jim Thompson
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ass with

elay

t; it is critical

the patented circuit "destroys" the effect you're looking for.

. You shouldn't have to stagger if you get it right.

ucing the double humped amplitude response. What is unclear for an all pas sive circuit is how they can be coupled and still provide the "second" reso nator having a resistor in series with it. There may be some way of tappin g, but it isn't obvious to me (yet).

nator is missing in (7) for example. I would have to go through it in deta il and see if there is a gain-less form of those equations that can be synt hesized into a network.

I am starting to question this patent. It is crap as far as a BPF goes. Q cir=0.734. It is looking mainly like a heavily overcoupled BPF (there is a 6 dB center dip). I'm not sure there was patentable magic in there, but that question no longer matters.

I did a narrower (than the patent) passive version that was also over-coupl ed to the point of 6-dB of ripple. The phase also flattens some towards th e middle. Perhaps the over-coupling simply "pushes" the gradients towards the edges.

Version 4 SHEET 1 6120 3588 WIRE -240 -672 -320 -672 WIRE 576 -672 -240 -672 WIRE 672 -672 576 -672 WIRE 800 -672 736 -672 WIRE 912 -672 800 -672 WIRE 1088 -672 992 -672 WIRE 1184 -672 1088 -672 WIRE 1344 -672 1248 -672 WIRE 1440 -672 1344 -672 WIRE 1616 -672 1520 -672 WIRE 1680 -672 1616 -672 WIRE 1808 -672 1744 -672 WIRE 3056 -672 1808 -672 WIRE 3104 -672 3056 -672 WIRE 1088 -576 1088 -672 WIRE 1344 -576 1344 -672 WIRE 1808 -544 1808 -672 WIRE -240 -528 -240 -672 WIRE 576 -528 576 -672 WIRE 800 -528 800 -672 WIRE 1616 -528 1616 -672 WIRE 3056 -512 3056 -672 WIRE -240 -288 -240 -448 WIRE 576 -288 576 -464 WIRE 576 -288 -240 -288 WIRE 800 -288 800 -464 WIRE 800 -288 576 -288 WIRE 1088 -288 1088 -512 WIRE 1088 -288 800 -288 WIRE 1344 -288 1344 -512 WIRE 1344 -288 1088 -288 WIRE 1616 -288 1616 -464 WIRE 1616 -288 1344 -288 WIRE 1808 -288 1808 -480 WIRE 1808 -288 1616 -288 WIRE 3056 -288 3056 -432 WIRE 3056 -288 1808 -288 WIRE -240 -240 -240 -288 WIRE 3056 -240 3056 -288 FLAG -240 -240 0 FLAG 3056 -240 0 FLAG 3104 -672 OUT_00 IOPIN 3104 -672 Out FLAG -320 -672 IN_00 IOPIN -320 -672 In SYMBOL res 3040 -528 R0 SYMATTR InstName R_load00 SYMATTR Value {Rload00} SYMBOL voltage -240 -544 R0 WINDOW 0 25 23 Left 2 WINDOW 3 25 93 Left 2 WINDOW 123 36 64 Left 2 WINDOW 39 27 106 Left 2 SYMATTR InstName Vsrc00 SYMATTR Value "" SYMATTR Value2 AC 2 SYMATTR SpiceLine Rser={Rsrc00} SYMBOL ind 896 -656 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 5 56 VBottom 2 SYMATTR InstName L1 SYMATTR Value 10µH SYMATTR SpiceLine Rser=1F SYMBOL ind 1424 -656 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 5 56 VBottom 2 SYMATTR InstName L2 SYMATTR Value 10µH SYMATTR SpiceLine Rser=1F SYMBOL cap 736 -688 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C1 SYMATTR Value 59.330671pF SYMATTR SpiceLine Rpar=1G SYMBOL cap 1184 -656 R270 WINDOW 0 32 32 VTop 2 WINDOW 3 0 32 VBottom 2 SYMATTR InstName C3 SYMATTR Value 12.547291pF SYMATTR SpiceLine Rpar=1G SYMBOL cap 560 -528 R0 SYMATTR InstName C4 SYMATTR Value 305.940513p SYMATTR SpiceLine Rpar=1G SYMBOL cap 784 -528 R0 SYMATTR InstName C5 SYMATTR Value 1.820912pF SYMATTR SpiceLine Rpar=1G SYMBOL cap 1744 -688 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C2 SYMATTR Value 59.330671pF SYMATTR SpiceLine Rpar=1G SYMBOL cap 1072 -576 R0 SYMATTR InstName C6 SYMATTR Value 36.057002p SYMATTR SpiceLine Rpar=1G SYMBOL cap 1328 -576 R0 SYMATTR InstName C7 SYMATTR Value 36.057002p SYMATTR SpiceLine Rpar=1G SYMBOL cap 1600 -528 R0 SYMATTR InstName C8 SYMATTR Value 1.820912pF SYMATTR SpiceLine Rpar=1G SYMBOL cap 1792 -544 R0 SYMATTR InstName C9 SYMATTR Value 305.940513p SYMATTR SpiceLine Rpar=1G TEXT -200 -976 Left 2 !.ac oct 100 5Meg 15Meg TEXT -1312 -2784 Left 2 ;o TEXT 5416 1528 Left 2 ;o TEXT 504 -1064 Left 2 !.net I(R_load00) Vsrc00 ; Rsrc & R_load determined from Vsrc and R_load TEXT -200 -864 Left 2 !.SAVE S11(vsrc00) S21(vsrc00) S12(vsrc00) S22(vsrc00 ) TEXT 504 -1152 Left 2 !.param Rsrc00 = 50 TEXT 504 -1112 Left 2 !.param Rload00 = 50 TEXT 1008 -848 Left 2 ;10 uH is SMRF2007-102M (Gowanda)\nwould need to be t uned LINE Normal -32 -1408 -32 -1408 LINE Normal -32 -1408 -32 -1408

Reply to
Simon S Aysdie

The following includes the prior passive over-coupled LC. It also includes a conceptual PD shelving circuit that flattens the mid-band shift a bit mo re.

More PD's would flatten it more than the single PD. The PD's also destroy the high-side rejection. (This is why I started with a 1-5 DC-inf pole dis tribution in the passive circuit.)

Again, the PD's are only conceptual. It is yours' now.

========================= =============== Version 4 SHEET 1 6120 3588 WIRE 3440 -1072 3072 -1072 WIRE 3072 -1024 3072 -1072 WIRE 3024 -1008 2992 -1008 WIRE 3024 -960 2992 -960 WIRE 3072 -928 3072 -944 WIRE 2720 -864 2576 -864 WIRE 2992 -864 2992 -960 WIRE 2992 -864 2800 -864 WIRE 3200 -864 2992 -864 WIRE 3440 -864 3440 -1072 WIRE 3440 -864 3280 -864 WIRE 3584 -864 3440 -864 WIRE 3696 -864 3664 -864 WIRE 4144 -832 3824 -832 WIRE 3824 -784 3824 -832 WIRE 3776 -768 3744 -768 WIRE 2320 -720 2240 -720 WIRE 2576 -720 2576 -864 WIRE 2576 -720 2320 -720 WIRE 3696 -720 3696 -864 WIRE 3776 -720 3696 -720 WIRE 2320 -688 2320 -720 WIRE 3440 -688 3072 -688 WIRE 3584 -688 3440 -688 WIRE 3696 -688 3696 -720 WIRE 3696 -688 3664 -688 WIRE 3824 -688 3824 -704 WIRE -240 -672 -320 -672 WIRE 576 -672 -240 -672 WIRE 672 -672 576 -672 WIRE 800 -672 736 -672 WIRE 912 -672 800 -672 WIRE 1088 -672 992 -672 WIRE 1184 -672 1088 -672 WIRE 1344 -672 1248 -672 WIRE 1440 -672 1344 -672 WIRE 1616 -672 1520 -672 WIRE 1680 -672 1616 -672 WIRE 1808 -672 1744 -672 WIRE 2016 -672 1808 -672 WIRE 2272 -672 2016 -672 WIRE 4144 -672 4144 -832 WIRE 4560 -672 4144 -672 WIRE 4608 -672 4560 -672 WIRE 3072 -640 3072 -688 WIRE 2240 -624 2240 -720 WIRE 2272 -624 2240 -624 WIRE 3024 -624 2992 -624 WIRE 3696 -624 3696 -688 WIRE 3904 -624 3696 -624 WIRE 4144 -624 4144 -672 WIRE 4144 -624 3984 -624 WIRE 2320 -592 2320 -608 WIRE 1088 -576 1088 -672 WIRE 1344 -576 1344 -672 WIRE 3024 -576 2992 -576 WIRE 4560 -576 4560 -672 WIRE 4928 -576 4560 -576 WIRE 1808 -544 1808 -672 WIRE 2016 -544 2016 -672 WIRE 3072 -544 3072 -560 WIRE 5104 -544 5008 -544 WIRE -240 -528 -240 -672 WIRE 576 -528 576 -672 WIRE 800 -528 800 -672 WIRE 1616 -528 1616 -672 WIRE 4560 -512 4560 -576 WIRE 5104 -512 5104 -544 WIRE 5008 -496 5008 -544 WIRE 2576 -480 2576 -720 WIRE 2736 -480 2576 -480 WIRE 2992 -480 2992 -576 WIRE 2992 -480 2800 -480 WIRE 3136 -480 2992 -480 WIRE 3200 -480 3136 -480 WIRE 3344 -480 3280 -480 WIRE 3440 -480 3440 -688 WIRE 3440 -480 3344 -480 WIRE 4928 -480 4928 -576 WIRE 4960 -480 4928 -480 WIRE 4960 -432 4928 -432 WIRE 3136 -384 3136 -480 WIRE 3216 -384 3136 -384 WIRE 3344 -384 3344 -480 WIRE 3344 -384 3280 -384 WIRE 4560 -352 4560 -432 WIRE 4928 -352 4928 -432 WIRE 4928 -352 4560 -352 WIRE 5008 -352 5008 -416 WIRE 5008 -352 4928 -352 WIRE 5104 -352 5104 -432 WIRE 5104 -352 5008 -352 WIRE -240 -288 -240 -448 WIRE 576 -288 576 -464 WIRE 576 -288 -240 -288 WIRE 800 -288 800 -464 WIRE 800 -288 576 -288 WIRE 1088 -288 1088 -512 WIRE 1088 -288 800 -288 WIRE 1344 -288 1344 -512 WIRE 1344 -288 1088 -288 WIRE 1616 -288 1616 -464 WIRE 1616 -288 1344 -288 WIRE 1808 -288 1808 -480 WIRE 1808 -288 1616 -288 WIRE 2016 -288 2016 -464 WIRE 2016 -288 1808 -288 WIRE 4560 -288 4560 -352 WIRE 4560 -288 2016 -288 WIRE -240 -240 -240 -288 WIRE 4560 -240 4560 -288 FLAG -240 -240 0 FLAG 4560 -240 0 FLAG 4608 -672 OUT_00 IOPIN 4608 -672 Out FLAG -320 -672 IN_00 IOPIN -320 -672 In FLAG 3072 -928 0 FLAG 2992 -1008 0 FLAG 2992 -624 0 FLAG 3072 -544 0 FLAG 3824 -688 0 FLAG 3744 -768 0 FLAG 2320 -592 0 FLAG 5104 -544 IL_adj IOPIN 5104 -544 Out SYMBOL res 4544 -528 R0 SYMATTR InstName R_load00 SYMATTR Value {Rload00} SYMBOL voltage -240 -544 R0 WINDOW 0 25 23 Left 2 WINDOW 3 25 93 Left 2 WINDOW 123 36 64 Left 2 WINDOW 39 27 106 Left 2 SYMATTR InstName Vsrc00 SYMATTR Value "" SYMATTR Value2 AC 2 SYMATTR SpiceLine Rser={Rsrc00} SYMBOL ind 896 -656 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 5 56 VBottom 2 SYMATTR InstName L1 SYMATTR Value 10µH SYMATTR SpiceLine Rser=1F SYMBOL ind 1424 -656 R270 WINDOW 0 32 56 VTop 2 WINDOW 3 5 56 VBottom 2 SYMATTR InstName L2 SYMATTR Value 10µH SYMATTR SpiceLine Rser=1F SYMBOL cap 736 -688 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C1 SYMATTR Value 59.330671pF SYMATTR SpiceLine Rpar=1G SYMBOL cap 1184 -656 R270 WINDOW 0 32 32 VTop 2 WINDOW 3 0 32 VBottom 2 SYMATTR InstName C3 SYMATTR Value 12.547291pF SYMATTR SpiceLine Rpar=1G SYMBOL cap 560 -528 R0 SYMATTR InstName C4 SYMATTR Value 305.940513p SYMATTR SpiceLine Rpar=1G SYMBOL cap 784 -528 R0 SYMATTR InstName C5 SYMATTR Value 1.820912pF SYMATTR SpiceLine Rpar=1G SYMBOL cap 1744 -688 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C2 SYMATTR Value 59.330671pF SYMATTR SpiceLine Rpar=1G SYMBOL cap 1072 -576 R0 SYMATTR InstName C6 SYMATTR Value 36.057002p SYMATTR SpiceLine Rpar=1G SYMBOL cap 1328 -576 R0 SYMATTR InstName C7 SYMATTR Value 36.057002p SYMATTR SpiceLine Rpar=1G SYMBOL cap 1600 -528 R0 SYMATTR InstName C8 SYMATTR Value 1.820912pF SYMATTR SpiceLine Rpar=1G SYMBOL cap 1792 -544 R0 SYMATTR InstName C9 SYMATTR Value 305.940513p SYMATTR SpiceLine Rpar=1G SYMBOL res 2000 -560 R0 SYMATTR InstName R_load1 SYMATTR Value {Rload00} SYMBOL e 3072 -656 R0 SYMATTR InstName E1 SYMATTR Value 1Meg SYMBOL res 3296 -496 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R1 SYMATTR Value 1e3 SYMBOL cap 2800 -496 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C10 SYMATTR Value 10e-12 SYMBOL e 3072 -1040 R0 SYMATTR InstName E2 SYMATTR Value 1Meg SYMBOL res 3296 -880 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R2 SYMATTR Value 1 SYMBOL res 2816 -880 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R3 SYMATTR Value 1 SYMBOL e 3824 -800 R0 SYMATTR InstName E3 SYMATTR Value 1Meg SYMBOL res 3680 -880 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R4 SYMATTR Value 1 SYMBOL res 3680 -704 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R5 SYMATTR Value 1 SYMBOL res 4000 -640 R90 WINDOW 0 0 56 VBottom 2 WINDOW 3 32 56 VTop 2 SYMATTR InstName R6 SYMATTR Value 1 SYMBOL cap 3280 -400 R90 WINDOW 0 0 32 VBottom 2 WINDOW 3 32 32 VTop 2 SYMATTR InstName C11 SYMATTR Value .1e-12 SYMBOL e 2320 -704 R0 SYMATTR InstName E4 SYMATTR Value 1Meg SYMBOL e 5008 -512 R0 SYMATTR InstName E5 SYMATTR Value {IL} SYMBOL res 5088 -528 R0 SYMATTR InstName R7 SYMATTR Value 1G TEXT -200 -976 Left 2 !.ac oct 1000 5Meg 15Meg TEXT -1312 -2784 Left 2 ;o TEXT 5416 1528 Left 2 ;o TEXT 504 -1064 Left 2 !.net I(R_load00) Vsrc00 ; Rsrc & R_load determined from Vsrc and R_load TEXT -200 -864 Left 2 !.SAVE S11(vsrc00) S21(vsrc00) S12(vsrc00) S22(vsrc00 ) V(IL_adj) TEXT 504 -1152 Left 2 !.param Rsrc00 = 50 TEXT 504 -1112 Left 2 !.param Rload00 = 50 TEXT 1008 -848 Left 2 ;10 uH is SMRF2007-102M (Gowanda)\nwould need to be t uned TEXT 4904 -280 Left 2 !.param IL_dB = -1.65389 TEXT 4904 -232 Left 2 !.param IL = {10**(IL_dB/20)} LINE Normal -32 -1408 -32 -1408 LINE Normal -32 -1408 -32 -1408

Reply to
Simon S Aysdie

--

> 
>It's normalized for simulation, as filters often are. 
> 
>If you're going to be snarky, try to be right.
Reply to
John Fields

--
Sly dog.
Reply to
John Fields

I'd have to design the actual filter, which takes research about standard values, tolerances, available parts, all that grunt work. I'm thinking that the main Ls and Cs would be the same values, 1 or 2% parts off the same reel, and then use two smaller caps to set the final frequencies of both resonators. Arithmetic and grunt work.

I posted numbers. They are neither important nor interesting.

The interesting issue here was whether it is even possible to build a bandpass filter with a flat or reversed phase shift region near the center. That involved stuff like network theory, group delay, thermodynamics, and causality. What Ls and Cs I eventually use at 40 KHz is trivial.

--

John Larkin         Highland Technology, Inc 

jlarkin at highlandtechnology dot com 
http://www.highlandtechnology.com 

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom laser drivers and controllers 
Photonics and fiberoptic TTL data links 
VME thermocouple, LVDT, synchro   acquisition and simulation
Reply to
John Larkin

[snip]

Bwahahahahahaha >:-} ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142   Skype: Contacts Only  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

Just trying to educate... and hope that the masses will think problems thru rather than buy the BS... but I doubt it :-( ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142   Skype: Contacts Only  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

I noticed the "µ" does some damage in pasted text when reopening in LTSPI CE. The inductor values require patching.

Reply to
Simon S Aysdie

On Tue, 06 Aug 2013 14:17:53 -0700, John Larkin wrote:

This works too. Turns out the the resonators don't need to be coupled, so it's easy to do with active filters, too.

Version 4 SHEET 1 1472 680 WIRE 512 -64 336 -64 WIRE 688 -64 592 -64 WIRE 784 -64 688 -64 WIRE 848 -64 784 -64 WIRE 944 -64 848 -64 WIRE 1104 -64 1024 -64 WIRE 1152 -64 1104 -64 WIRE 1184 -64 1152 -64 WIRE 688 -16 688 -64 WIRE 784 -16 784 -64 WIRE 688 96 688 48 WIRE 784 96 784 64 WIRE 336 192 336 -64 WIRE 496 192 336 192 WIRE 704 192 576 192 WIRE 784 192 704 192 WIRE 848 192 784 192 WIRE 944 192 848 192 WIRE 1104 192 1104 -64 WIRE 1104 192 1024 192 WIRE 704 224 704 192 WIRE 784 224 784 192 WIRE 336 272 336 192 WIRE 704 352 704 288 WIRE 784 352 784 304 WIRE 336 400 336 352 FLAG 336 400 0 FLAG 688 96 0 FLAG 784 96 0 FLAG 704 352 0 FLAG 784 352 0 FLAG 1152 -64 SUM FLAG 848 -64 A FLAG 848 192 B SYMBOL voltage 336 256 R0 WINDOW 0 75 34 Left 2 WINDOW 3 56 73 Left 2 WINDOW 123 62 105 Left 2 WINDOW 39 0 0 Left 2 SYMATTR InstName V1 SYMATTR Value SINE() SYMATTR Value2 AC 1 SYMBOL res 608 -80 R90 WINDOW 0 71 61 VBottom 2 WINDOW 3 82 60 VTop 2 SYMATTR InstName R3 SYMATTR Value 250 SYMBOL res 592 176 R90 WINDOW 0 79 56 VBottom 2 WINDOW 3 95 58 VTop 2 SYMATTR InstName R4 SYMATTR Value 250 SYMBOL ind 768 -32 R0 WINDOW 0 60 48 Left 2 WINDOW 3 65 81 Left 2 SYMATTR InstName L1 SYMATTR Value 1 SYMBOL ind 768 208 R0 WINDOW 0 61 36 Left 2 WINDOW 3 59 73 Left 2 SYMATTR InstName L2 SYMATTR Value 1.005 SYMBOL cap 672 -16 R0 WINDOW 0 -53 31 Left 2 WINDOW 3 -45 68 Left 2 SYMATTR InstName C1 SYMATTR Value 1 SYMBOL cap 688 224 R0 WINDOW 0 -63 22 Left 2 WINDOW 3 -70 59 Left 2 SYMATTR InstName C2 SYMATTR Value 1.005 SYMBOL res 1040 -80 R90 WINDOW 0 67 62 VBottom 2 WINDOW 3 77 60 VTop 2 SYMATTR InstName R5 SYMATTR Value 100K SYMBOL res 1040 176 R90 WINDOW 0 -57 56 VBottom 2 WINDOW 3 -49 57 VTop 2 SYMATTR InstName R6 SYMATTR Value 100K TEXT 1016 256 Left 2 !.ac lin 10000 0.13 0.18 TEXT 928 304 Left 2 ;BP Filter with low phase shift III TEXT 1016 352 Left 2 ;J Larkin Aug 9, 2013

--

John Larkin         Highland Technology, Inc 

jlarkin at highlandtechnology dot com 
http://www.highlandtechnology.com 

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom laser drivers and controllers 
Photonics and fiberoptic TTL data links 
VME thermocouple, LVDT, synchro   acquisition and simulation
Reply to
John Larkin

The killer for impedance control is the board thickness, i.e. space between trace and ground plane.

I gather you don't know what a dummy device is based on your reply. There are things you can do to control the CDs.

Reply to
miso

Search for INF4420_03_Layout_Print.pdf

See page 57 to see dummy devices used to improve lithography.

For a trace on a PCB, the philosophy is the manufacturer has tuned the process for metal, then space, then metal, etc. That is, the critical dimension (CD) of the process is based on such a pattern. If you don't put the dummy strip in, then the etching is not based on the target CD pattern.

When Cadence (Dracula back then) was first on the market, they went crazy with all these dummy devices. They never saw dummies, since it is something only done for analog.

Reply to
miso

I build picosecond electronics on FR4 and it works, almost always the first try.

formatting link

And I do it without violating any of the laws of thermodynamics.

--

John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom timing and laser controllers 
Photonics and fiberoptic TTL data links 
VME  analog, thermocouple, LVDT, synchro, tachometer 
Multichannel arbitrary waveform generators
Reply to
John Larkin

miso is almost always out to lunch.

But, this time, miso is 100% on target.

You _don't_know_ what a dummy device is, do you ?:-)

You should learn. Might help your "picosecond electronics".

Beware the snark because it is manic-depressive >:-} ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142   Skype: Contacts Only  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

I failed to point out...

the effective "Q" of this PLL "bandpass" is only 5, since I wanted it to finish simulation (reach equilibrium) before filling my hard-drive with data.

With an equivalent Q of 50 it will retrieve a clock buried in far more nasty noise.

Try it some time. The first time I observed this (nearly 50 years ago) I was astonished! ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142   Skype: Contacts Only  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

You snip everything, so I can never tell who or what you are replying to.

--

John Larkin Highland Technology Inc

formatting link
jlarkin at highlandtechnology dot com

Precision electronic instrumentation Picosecond-resolution Digital Delay and Pulse generators Custom timing and laser controllers Photonics and fiberoptic TTL data links VME analog, thermocouple, LVDT, synchro, tachometer Multichannel arbitrary waveform generators

Reply to
John Larkin

The first time I made a PLL lock to a signal buried in noise was also about 40 years ago, but I wasn't astonished because I expected it. I was of course a lot younger than you at the time.

A PLL and a lock-in and a bandpass filter and a radio are all about the same, give or take a few dB. I still want a bandpass filter ahead of my PLL.

--

John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom timing and laser controllers 
Photonics and fiberoptic TTL data links 
VME  analog, thermocouple, LVDT, synchro, tachometer 
Multichannel arbitrary waveform generators
Reply to
John Larkin

I was around 23 years old. And I don't think Gardner's first edition had even been published yet (my second edition is copyrighted 1979). Yep. I was astonished. And delighted.

Of course you're still a "lot younger" than me (but pushing old age yourself ;-) but, in spite of your age and "wisdom", you still pose causality-defying questions like...

"Is there a form of bandpass filter that has no phase shift vs frequency around the center of its pass-band?"

Go ahead, if it makes you feel good >:-}

I did suggest that a low-Q one ahead of the PLL would be helpful to minimize noise, in an earlier post. (And won't screw up the phase... the wider the BW the softer the phase slope.) ...Jim Thompson

--
| James E.Thompson                                 |    mens     | 
| Analog Innovations                               |     et      | 
| Analog/Mixed-Signal ASIC's and Discrete Systems  |    manus    | 
| San Tan Valley, AZ 85142   Skype: Contacts Only  |             | 
| Voice:(480)460-2350  Fax: Available upon request |  Brass Rat  | 
| E-mail Icon at http://www.analog-innovations.com |    1962     | 
              
I love to cook with wine.     Sometimes I even put it in the food.
Reply to
Jim Thompson

dBm in case one. dB in the latter.

The operational characteristics of the PLL itself should be all that would be needed (or matter) as to determine whether such filtration would be needed (or matter). It can lock, or it cannot. There is no 'try'.

In such a case, the criterion defining the quality of "the lock" (read PLL) should be all that matters. Let the downstream circuitry have the entire spectrum and handle it, if possible. You never know what might be lurking near or embedded in the noise floor. Lots of nice, random numbers down there... :-)

Reply to
FullMettleJacket

I posted a couple of Spice files for filters that do exactly what I described. Zero phase shift midband and +- adjustable phase/frequency slope about that point by tuning one or two resistors.

A network with a wiggly phase-versus-frequency curve doesn't defy causality. You never talk about conservation of energy or thermodynamics of causality - you're just parroting what other people have said because you're a mean-spirited insecure SOB.

Run my filters, and see if the universe collapses or something.

A phase slope of zero is even better, and I don't have to compromise Q. I think a filter that can do this is cool, in its own right, despite it being, as you claim, non-causal.

It't really not worth answering your posts. You're not actually interested in electronics.

--

John Larkin                  Highland Technology Inc 
www.highlandtechnology.com   jlarkin at highlandtechnology dot com    

Precision electronic instrumentation 
Picosecond-resolution Digital Delay and Pulse generators 
Custom timing and laser controllers 
Photonics and fiberoptic TTL data links 
VME  analog, thermocouple, LVDT, synchro, tachometer 
Multichannel arbitrary waveform generators
Reply to
John Larkin

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