Attenuation of op-amp gain

A design I'm doing uses and ADC with a 2.5 volt reference. The ADC if buffered with a voltage follower. The problem is that some of the signals are >2.5 volts, and have an Rout of

10K or more. At first thought one would use a voltage divider with high resistance values (x10**6 ohms)in front of the op-amp. The problems with that are that it increases the resistor noise and the Rin varies with each attenuation setting (0-2.5v, 0-5v, 0-12v, 0-50v). Any good ideas on a simple way to do this and keep a relatively constant Rin at 10M or more?

Thanks, Dave

with a voltage follower. The problem is that some

thought one would use a voltage divider with high

are that it increases the resistor noise and the Rin

ideas on a simple way to do this and keep a relatively

His answers to those questions will not influence the outcome of receiving useful information from you that can be applied to anything, they will only lead to more questions and generalistic bs from you. You're so dumb, you can't even so much as outline a simple constant input impedance attenuator.

I read in sci.electronics.design that Dave Boland wrote (in ) about 'Attenuation of op-amp gain', on Thu, 31 Mar 2005:

Buffer the high-impedance signals individually and attenuate the buffer outputs? No high impedance input required.

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buffered with a voltage follower. The problem is that some

thought one would use a voltage divider with high

that are that it increases the resistor noise and the

good ideas on a simple way to do this and keep a

argument!

There is unlikely to be any argument. For reasons not relevant here, I have acquired a vile shadow who feels obliged to post some vitriol in response to my posts. A brief review of his recent posting history should be enough to help you understand his purposes adequately.

accuracy should be better than 1%, and yes there is a

I will take that to mean that you are only looking for accurate response from DC to something less than 1 KHz. That eases the problem considerably since getting accurate frequency response from high impedance attenuators is an interesting challenge above a few 10's of KHz.

DVM schematics and the only on I found was for the

What would be most helpful is to understand the real requirement. Without that, "solutions" offered here are very likely to solve a different problem than your own.

one, making the gain less than one. I have not been

are not stable for gains less than 1.

If the op-amp is designed to be stable in the unity gain configuration, it will be stable for those Rf/Ri values. To see why, consider the loop gain rather than the closed loop gain. (None of this is to diminuate the issue with feedback lag due to shunt capacitance at the inverting input.)

If the inverting configuration solves your problem, except for your stability concerns, I suggest you go ahead with it. To get a "better" solution would still require knowing your actual SNR requirement, the range of source impedances, cost goals, any gain switching requirement, and active input ranges.

If you use the inverting configuration, you can place a cap around the feedback resistor to stabilize the circuit (assuming it is unity gain stable) and form one (real) pole of your anti-aliasing filter.

Given what you've stated so far, I do not understand your concern with resistor noise. Unless you have conversion accuracy greatly exceeding the 1% you mention above, (and plan to acquire much greater accuracy also), that noise should not be a problem.

HTH.

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--Larry Brasfield
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Above views may belong only to me.

Oh my, it looks like I've stepped into a hornets nest. Didn't mean to start an argument!

The system runs under a RTOS, and the fastest readings are

500uS. The accuracy should be better than 1%, and yes there is a filter between the op-amp and the ADC.

Perhaps thinking of this as an intelligent DVM would be helpful. I looked for DVM schematics and the only on I found was for the Intersil chip. I'll spend some more time on this later this afternoon.

I have seen some designs where the Rf/Ri for an op-amp stage was less than one, making the gain less than one. I have not been able to find the design or the part (op-amp). The op-amps I have seen so far are not stable for gains less than 1.

Thanks for the help so far.

Dave,

The first thing that comes to mind is use a unity gain voltage follower op-amp followed by a gain of (say) 0.5 inverting op-amp. Something like a TL082 and a couple of resistors could do the whole job. IIRC, the TL082 is unity gain stable. If not there are certainly bi-fet amps that are.

Ted

You have quite a few shadows being the pretentious,pompous, and unaccomplished phony that you are.

Apparently not enough "easing" for your sorry and confused excused for a brain...

You already have enough information, the OP has given you the various attenuation ranges required, the output impedance of his sources, the sampling rate, the input voltage range, and the accuracy requirement. But you still insist on more information because you're clueless and need to stall.

You already have enough information- it is a simple DVM- but still you have nothing to offer. Getting anything to work at even DC does not seem to be one of your strong points.

No kidding...

It should be obvious the OP does not know very much- resistor noise is just something he has "heard" of.

That is a lot of hoping- most of your posts consist of non-informational and low-quality garbage. BTW - I really enjoyed your dog simple confusion over power line induction of currents into that copper pipe- too damned dumb to understand the OP said it was overhead and 100' removed- but not a bad try for a pedantic pseudo-intellectual- at least you have those elementary trig function derivatives on tap.

Quite highish input offset voltage though.

Graham

STMicroelectronics show a version of the TL082B with 1mv typ/3mvmax Vio and 10uV/C. 2{log}2.5÷1E-3 = 11.3 bits so there should be no problem for 10 bits or less. With an offset adjustment on the second stage, the offset could be further reduced enough for a few more bits.

Ted