It is obvious to anyone but the most retarded rib=poking dolt what he meant. This from the idiot that calls his misspellings typos. THIS was a typo. That fact is obvious, as is your stupidity for either being blind to it, or using it to poke someone in the ribs with.
Unless of course all the signals in one bus change in the same direction at the same time. This is a worst case situation, but it is difficult to guarantee that it won't happen.
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For what kind of signals, with what kind of transistion times? Sloppy habits that you can get away with at 100MHz can be fatal at 500MHz.
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But aren't brave enough to say what sort of signal lvels you were dealing with , or the signal transition times that your logic outputs offered - as opposed to the rather slower transistion times that your half-baked stack would have delivered to the logic inoytst that you were driving.
gh.
Your grasp of the subject doesn't suggest that you could reliably distinguish the junk from the good stuff
In fact the Motorola (now ON-Semiconductor) ECL application notes were fairly detailed, if somewhat over-simplified Fairchild and Philips (now NXP) had similar application notes for their 100K and 300K ECL.
Howard Johnson and Martin Graham have written two books that address the subject "High speed Digital Design" and "High Speed Signal Propagation" (ISBN 0-13-395724-1 and ISBN )-13-084408-X respectively). As John Larkin has mentioned, the books are poorly organised and not as helpful as they might be, but they are better than nothing.
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