A little help with JK flip flops and counters!

Setting both JK HIGH makes it into a TOGGLE FF and this is the building block of a RIPPLE counter where either the Q or /Q of the JK is used as the CLOCK of the next stage JK depending on whether the IC implementation uses positive or negative clock edge triggering. For the parking lot application a single counter can be used as an INTEGRATOR. Cars entering increment the counter and cars leaving decrement the counter. There must be external control so that when in all 0's state further decrement pulses due to cars leaving are locked out, and when in all 1's or some other state representing maximum capacity further increment pulses are inhibited and the FULL sign is lit. This assumes there is an entrance gate. If there is no entrance gate then the counter requires OVERFLOW capacity, the FULL sign is lit when the counter increments past maximum capacity, increment pulses are never inhibited in any state, FULL sign is extinguished when counter decrements below maximum capacity.

Fred Bloggs,

Thank you for your prompt reply, but could you expand on what you mean by an 'INTEGRATOR'? I've had a look for further explanation and cannot find anything! Does it take the form of some kind of component that you insert before the counter, or is it implemented within it? Thank you for your time, I am relatively inexperienced with electronic design and appreciate all the help you can give me.

Also, for clarification - in my initial post I stated I was using components in the 'LS41 series'. Clearly I'm talking rubbish! I meant '74LS'!

How To Design With Parts:

Step 1: Find a data sheet.

Step 2: Read it.

Step 3: Think.

If you find a data sheet of a JK flip flop in the series you're looking at (surely you mean 74LS?) you'll see what all the inputs do -- clear, J, K, clock and (if it's there) preset.

Have they troubled to show you Karnaug maps yet? If not do a web search (and pardon my spelling) or look in your logic textbook. You should be able to go from first principals to design an up/down counter using JK flip flops and gates. You should also be able to grab a 74LS series data book and find an up/down counter, but that's your problem.

Integrator, in this context, means a digital accumulator that simulates integration (is in the funny stretched 's', the 'dt' at the end, and all the hair lying around that you pulled out trying to solve it).

Is that an absolute requirement? 74LS is a rather antique and obsolete technology. So is 4000 series CMOS, but it is a hell of a lot easier in CMOS than TTL.

I'm presuming that you are "given" a sensor of some sort with a pulse output?

Jim

We have to use components in the LS41 series.

You don't need two counters. What you need is an up/down counter. Google it and you'll find lots of design mostly using JK flip-flops. One common place to "steal" a circuit is from a datasheet. Find an up/down counter chip in any of the logic family, like the 74HC169 for example, and look up the datasheet. You'll usually find a simple schematic to explain the operation of the chip.

As a general term, integrator means to make many as one. In this case the "many" is the entire previous history of increment and decrement pulses to the counter and the "one" is the counter state at one particular point in time which represents the net count of cars in the lot. If you look at the sequence of binary patterns, the up/down RIPPLE counter is especially easy to make from JK FFs.