74hc595 shift registers, what am I doing wrong?

Oops.

Ideally the "wire" would consist of a separate twisted pair (with ground) for each clock and signal.

Rule of thumb: you should consider the "wires" as transmission lines if their length is more than 1/6 the "length of a transition". "Length of transition" means the distance the signal travels during the rise or fall time.

On a PCB, that equates to about an inch per ns; it is a bit longer in free air. In practice you might be able to get away with a few inches/ns.

Note that the clock frequency is irrelevant, only the transition rise/fall time. That corresponds with your observations.

So, what's the risetime?

What scope bandwidth, what type of probe, and how is it connected? A 6" ground lead has ~150nH inductance and, coupled with a probe capacitance of 20pF will ring at 50-100MHz. Given sharp edges, it is easily possible to see +-1V ringing.

Look up "source termination" and "parallel termination"; there are many many references.

I think we've done 5 or 6. We also use a lot of TPIC6595 chips, the

Right. Low coffee threshold levels cause data transfer errors.

Just use some HCTxxs to boost the clock (and other sigs) to a solid 5 volts.

I misspoke previously... the "Magic Block" is not inverting, but the input inverter does the inverting.

Turn it around, Magic Block first, then inverter,, even with 2N4401, the edges are fast... but overall it does invert, so add another ;-)

...Jim Thompson

I addressed how to use 2N4401 plus an inverter in another branch of this thread.

...Jim Thompson

Yikes! Add RC delays in the data paths!

Yikes! That can make ugly clocks. Add schmitt triggers!

RC lowpass and schmitt all the inputs to each board. Make the clock RC shorter than the data RC, 100 us and 1 ms maybe.

I saw an billboard design that used lamp boards that were naiive TTL shift registers. I think it was Shea Stadium. It didn't work well.

Or use some of those "IC" things.

Yep. There are specialty chips just for such purpose. ...Jim Thompson

To my knowledge, the pi's GPIO are all identical, with the sole exception b eing that the pins dedicated to i2c have 1.8K pullups.

Regardless, I'm using GPIO 23, 24, and 25, which are not the i2c pins and d on't have pullups on them. GPIO uses a Broadcom BCM2835. The specification of the output ports is at

Scott

Yep, we hit on that. It sounds like a hobby project though, and he's got the 'LS04s.

Cheers, James

Hey, whatcha' got against spaghetti anyway?

The real issue is the edge speed of the transition. For a clock you are damned if you do, damned if you don't. A fast edge will be more likely to cause problems with reflections corrupting the edge and causing double clocking. A slow edge is less resistant to noise causing double clocking. :(

Sounds like your shift register boards are already designed and you can't do anything with them. So you are stuck with single ended signals.

Have you put a fast scope on the shift register clock inputs? This sort of noise can hard to see with a scope as adding the probe to the circuit changes it. Try putting your ground on the rPi and scoping the ground on the shift register. If you see much noise there you have a problem that will be hard to fix unless you deal with the signal integrity issue.

Aren't LS04s also 5 volt devices? How will they change anything?

They translate the Pi's 3.3v outputs to 5v, and buffer the extended clk line.

His first problem is he's using an open-drain translator that can't drive his capacitive load. (That's why the 'scope probe spoils it.) A buffer would fix that.

Simple stuff.

Cheers, James Arthur

Nuttin. Whole wheat, and I'm in!

Angel-hair circuits though--that's not always as tasty.

Cheers, James Arthur

Oh, they are TTL so they can be driven... right, but they have TTL outputs, not CMOS and so can't drive the HC595s any better than the rPi is doing, in fact they are true TTL and won't drive any better. I suppose you can hand a pullup on the output if it is a low value, His first problem is he's using an open-drain translator that

No, he is using the FET as a switch, not an amplifier. If he drove the gate from the right voltage that circuit should work just fine.

It is if you get it right.

See LevelTranslator.pdf on the S.E.D/Schematics Page of my website.

"Magic Block" now updated with judicious Baker clamping, so that it now has a respectable rise time, buffer with 74HCxx on the 5V side and it should be plenty good. ...Jim Thompson

up in either a 3-chip or 6-chip configuration. I'm driving them with a ras pberry pi. They're driven with three pins: data, clock, and latch. Data is daisy-chained from chip to chip. Clock and latch are common to all chips. T he latches are powered via 5V. The raspberry pi is a 3.3V device.

puts) with 3 shift registers. It's greatly unstable with 6 shift registers. I get numerous errors on the outputs. Sometimes I get random gibberish.

figuration go wonky. 10X scope probe is fine.

V logic, I tried installing a 2N7000 based level shifter on the clock and l atch pins (since those are the ones common to all chips, and thus affected by adding more registers). There's nice clean 5V clock pulses now, but if a nything it made the problem worse.

Are your "wires" bundled? With the very high circuit impedances, you almost certainly have major crosstalk issues, inter-wire signal coupling, things like data changes causing erroneous clocking and vice versa. That's one rea son why the "nice clean 5V clock pulses" made things worse. A few feet of w ire is not so bad that you need any kind of special termination. This very easily cleaned up, but I'll let the residents "experts" tell you all about it.

HCTxx buffers would be better. 04s, 244s, whatever. Parallel some sections for serious drive into a terminator.