5V to 3.3V translation with source termination

Sounds like the safe thing would be to put a TinyLogic buffer right near the VCO, power it from 3.3 volts, and source terminate there. Many of the Tiny buffers tolerate input swings above their own Vcc.

If the VCO is that wimpy, you could try running it right into the FPGA, but that may not be a solid fix.

John

Reply to
John Larkin
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Hi,

I'm trying to supply a clock to one of the 3.3V GCLK inputs on a Xilinx Virtex-II FPGA. Due to other requirements I need to use a 5V VCO (TI TLC2932) to drive this input, but I'm having some problems.

I thought about using a voltage divider to convert the 5V VCO output to

3.3V, but the PCB trace between the VCO and the FPGA is reasonably long, so I need to include some termination. This is where I run into difficulty.

I was going to terminate the line with a 33Ohm series resistor near the VCO. This would be fine if the VCO had a low output resistance, as I could just use something like a (33 - VCO_output_resistance)Ohm resistor in series and a 75 Ohm to ground, which should give me 3V with 30Ohm looking back into the source from the transmission line.

However, the VCO provides a 5V square wave at 2mA, so would I be right in saying that it's got a 2.5k source impedance?

If that is correct then this is where I get stuck. I can divide the signal down to 3V with a 5k pull down at the output, but the equivalent resistance of this will be 1.7k. Alternatively, I could use a 33Ohm pulldown on the output which would give me my 33 Ohm terminating resistance, but the signal would only be 65mV.

Does anyone have any hints on how I can source terminate this VCO to

33Ohms whilst level translating from 5V to 3.3V?

Steve

Reply to
Steve

Quite unlikely. What they're saying is that the output is 5V, but it can only source 2mA (20mA absolute maximum, according to the spec). Your load impedance can be no more than 2.5K.

This isn't going to work. I think you're going to be better off with the 300ohm series damping resistor, but I'd want to simulate it if the net is long. Glancing over the spec, it appears that the device is CMOS, so it will have a low output impedance.

If I were really worried about it, I'd use a quickswitch. I've never used Virtex-II, but IIRC Virtex-E allowed 5V operation, as long as you have a series resistor (at least 100ohm, IIRC; it's been a long time).

Is there a reason you're not using the PLL Vdd at 3V?

--
  Keith
Reply to
Keith Williams

[snip]

Did you read the TL2932 data sheet?

Run it on 3.3V ;-)

...Jim Thompson

--
|  James E.Thompson, P.E.                           |    mens     |
|  Analog Innovations, Inc.                         |     et      |
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Reply to
Jim Thompson

On Fri, 21 Oct 2005 19:39:57 +0100, Steve wrote: ...

I went to look this up: "Oh, HCMOS into a Virtex-II? Shouldn't it be HC-compliant?" Holy Yikes! Over 4V, it blows up!

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See how cheap you can get 3.3V zener diodes and 1K resistors. :-)

Good Luck! Rich

Reply to
Rich Grise

It's specified down to 3V operation, which would make your interface problem moot.

But, if you must, I think it was Larkin who recommended a "TinyLogic" interface. You can get them for 5V-to-3.3V or vice versa.

...Jim Thompson

--
|  James E.Thompson, P.E.                           |    mens     |
|  Analog Innovations, Inc.                         |     et      |
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Reply to
Jim Thompson

If it can source 2mA then wouldn't I want a load *greater* than 2.5k? If I had a 100 Ohm load then I'd need to source 50mA to put 5V across it.

I can get a larger lock range from the PLL at 5V, and a wide range is quite important in my application.

Thanks for your help!

Steve

Reply to
Steve

Oops, try "50 - VCO_output_resistance"!

Steve

Reply to
Steve

I've used this circuit at 27MHz on video framestores with no problems. Put a series termination of 33R in the line at the last device.

+5V +3.3V | | .-. .-. 1k| | 640R| | | | | | '-' '-' | | +---+ +---- 1k | | | ___ |/ | |/ -|___|--| +---| 2 x 2N3904 |> |>

| | o----+----o | === GND (created by AACircuit v1.28.6 beta 04/19/05

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John

Reply to
John B

I have read the TL2932 datasheet but I don't see anything that suggests to me that there are advantages to running the device on 3.3V (aside from easier interfacing with my FPGA, of course). Am I missing something?

Cheers,

Steve

Reply to
Steve

I haven't studied the datasheet in this regard, but isn't it true you can adjust the TLC2932's lock range by changing a resistor? What frequency do you need?

--
 Thanks,
    - Win
Reply to
Winfield Hill

Yes, sorry.

I didn't notice that in the spec. Can you afford another package. As I mentioned, quickswitches are very nice for such level translations. You also might want to check the Xilinx site for ANs on such things. There was a way to receive 5V signals with Virtex and Virtex-E. You might also ask on comp.arch.fpga. The Xilinx developers (Peter Alfke, et. al.) hang out over there.

--
   Keith
Reply to
keith

Um, that _is_ the advantage? Since the performance is no worse (or so I'm given to understand), it solves the problem in zero parts. :-)

Good Luck! Rich

Reply to
Rich, Under the Affluence

I need a wide lock range in my application. This device meets my spec when running at 5V but at 3.3V its lock range decreases and doesn't meet my spec, unfortunately.

However, I was digging around and I've come across the TLC2933 which looks almost identical to the TLC2932 except that when running at 3.3V it gives a much wider lock range than the TLC2932.

So I'll have a more thorough read of this chips datasheet and if it looks good, I'll go for it. If not, then those TinyLogic buffers also look good.

Thanks to everyone for your replies!

Steve

Reply to
Steve

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