3.3v <> 5v interfacing @ 15Mhz

Nov 25, 2006 81 Replies

Theoretically it should be maximum at the design center of the TTL threshold, ~1.4V.

Maybe the 0.9V you measure is just process skew?

...Jim Thompson

| James E.Thompson, P.E. | mens | | Analog Innovations, Inc. | et | | Analog/Mixed-Signal ASIC\'s and Discrete Systems | manus | | Phoenix, Arizona Voice:(480)460-2350 | | | E-mail Address at Website Fax:(480)460-2142 | Brass Rat | | http://www.analog-innovations.com | 1962 | I love to cook with wine. Sometimes I even put it in the food.

It's generally quite poorly documented, and varies across vendors, and Logic families. The Schmitt devices tend to have lower peaks than non schmitt devices. Seems to be an after-thought to most digital designers....

-jg

Join the Discussion

Have something to add? Share your thoughts — no account required.

Didn't find your answer?

Ask the community — no account required