Good practice anyway to place chip components perpendicular to nearby sources of strain, in this case, parallel to the board edge. That's what the manufacturers recommend. May not be enough though, given the presence of said gorillas.
I like routed/milled boards better anyway: you don't get fingers full of itchy fibers from handling them :-)
Tim
--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
been your experience with 0.031" PCBs? Have you had durability problems? Did it complicate manufacturing? My PCB will be roughly 3" x 3".
It's tough to do with components on both sides of the board, on both sides of the score. There are tools to do this but they were too cheap (but wasted *tons* in other areas). The problem is that the recommended score and mouse bites are marginal, and of course everyone crowds the edges (raises hand). "I *know* that ten pounds will fit in that 5# bag."
I would think you'd need a different tool for each board. Several, in fact. Once we got the recipe down, there weren't a lot of problems. The problems were up-front, when the schedules are the tightest, of course (get the thing to market so the boss can afford to pay us).
been your experience with 0.031" PCBs? Have you had durability problems? Did it complicate manufacturing? My PCB will be roughly 3" x 3".
In the ECL mainframe days, 80ohms was the normal trace impedance (some used 50 ohms for clocks). The higher impedance reduced power, at the cost of speed, of course (which is why the clocks were often 50 ohm). When I designed the testers, I usually chose 90 ohms; lower current yet and it's close to ribbon cable (~100 ohms).
been your experience with 0.031" PCBs? Have you had durability problems? Did it complicate manufacturing? My PCB will be roughly 3" x 3".
Right. If you can etch 4 mil wide traces, a stripline embedded in FR4 needs a plane separation of about 12 mils (6 above the trace, 6 below) to get 50 ohms. That suggests big trouble for, say, a 16 layer board.
I just don't understand things like 20 or 30 layer boards, unless they are really thick, or made of low Er stuff, or have insanely low impedance traces. Anybody done one? What was the stackup?
--
John Larkin Highland Technology, Inc
jlarkin at highlandtechnology dot com
http://www.highlandtechnology.com
Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom laser drivers and controllers
Photonics and fiberoptic TTL data links
VME thermocouple, LVDT, synchro acquisition and simulation
I kind of wished we did that way back with one of our older projects. It was only a double sided board however, we didn't use heavy copper and many of the traces are very thin to say the least, just something we over looked or didn't think it was important at the time.
These items are used in some areas that has modest moisture and PCB failures are starting to show due to trace deterioration.
"Jamie" wrote in message news:wfEms.15221$ snipped-for-privacy@newsfe02.iad...
Was testing a new power board today: 80 mil wide, 2oz traces carrying up to 8A. Looks really cool on the FLIR, turn on the power and the traces light up like neon signs before the glow from resistors and transistors overwhelms the scene.
Tim
--
Deep Friar: a very philosophical monk.
Website: http://webpages.charter.net/dawill/tmoranwms
been your experience with 0.031" PCBs? Have you had durability problems? Did it complicate manufacturing? My PCB will be roughly 3" x 3".
Not at all. The parts are first available in .5mm pitch BGA. Several months later the versions intended for our market hit the streets. We get at least six months head start by prototyping with the commercial parts. The software guys like the extra time to play. When the real parts are available, it's a quick, low risk, spin.
I just repaired my daughter's SONY mini hifi (broken belt). As I had the FLIR cam ready on hand I just pointed it to that, well, POS
At rest, some PCB portions around small heatsinks (regulators I think) are more than 90 celsius! I changed some 'litycs that are beginning to leak, but same temp.
Thick board for passive backplane application in something that went into a phone exchange. This was from the days when buses were parallel, so there were lots of traces between the press fit connectors. It needed a lot of planes to keep the crosstalk down. I don't recall the exact stackup but it was pretty much a regular board with normal thickness Cu and prepreg, just more layers.
The thick board also helped with mechanical stability.
I don't see things like that these days. PC motherboard costs have forced buses to be serial so it's now possible to move many Gb/s around with only a modest number of PCB layers.
You've obviously not seen a modern VME or Compact PCI chassis with modern connector technology.
PCB backplanes are at 0.090" and even 0.120" or possibly even more Mainly for rigidity since huge cards are inserted into dense connectors (far more dense than in telco days) against them on both sides (front of chassis and back of chassis)
Telco was 40 or 80 pins per connector, max... on a good day.
These are like 250+ pins per connector with two per card plus power sections.
Motherboards were not "forced" to be serial, and it never had anything to do with "costs" either.
Hard drives and their interface technology is from THEIR industry, and THEN the PC Motherboard makers follow suit.
SAS get placed on a motherboard because SAS drives exist, not because MOBO makers wanted to have lower costs.
been your experience with 0.031" PCBs? Have you had durability problems? Did it complicate manufacturing? My PCB will be roughly 3" x 3".
Clark boards for the IBM 3081 through 390 series machines were about 100 layers, to allow escaping all the traces from a big thermal conduction module (TCM).
The last high-end server board I had in my hands, about 2005 (the Regatta), was also very thick, but iirc it was only about 32 layers because PCB litho had improved.
It's all about the number of LGA pads you have to escape--the problem becomes hard quadratically, since the number of available traces per layer goes up like the perimeter, whereas the number of lands goes as the area.
Cheers
Phil Hobbs
Cheers
Phil Hobbs
--
Dr Philip C D Hobbs
Principal Consultant
ElectroOptical Innovations LLC
Optics, Electro-optics, Photonics, Analog Electronics
160 North State Road #203
Briarcliff Manor NY 10510
hobbs at electrooptical dot net
http://electrooptical.net
We love our FLIR. We scope every new design to see what's getting hot.
I just scoped a SOT-23 transistor running over 100C. Turns out the PADS footprint got rotated somehow, and a lot of current is running through the zenered b-e junction.
PADS is tricky that way. One incorrect SOT23 pinout can get imported from the library, and all subsequent inported SOT23s inherit the problem. Looks like somebody defined a 2-terminal zener with pins 1 and 2, in the wrong places for a standard SOT23.
The ECO fix is to bend the leads over and solder the part in rotated. I hate to do that.
--
John Larkin Highland Technology Inc
www.highlandtechnology.com jlarkin at highlandtechnology dot com
Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom timing and laser controllers
Photonics and fiberoptic TTL data links
VME analog, thermocouple, LVDT, synchro, tachometer
Multichannel arbitrary waveform generators
Neither VME nor cPCI backplanes need a lot of layers. And the power planes can be sandwiched very close to one another without impedance problems.
PCI ran out of steam on throughput because of skew issues. And it was too expensive, in terms of pins and copper and PCB layers, both on the mobo and the connectors/add-in boards. The lanes of PCIe are tiny pairs, as few as one pair to a slot, and skew between lanes doesn't matter.
PCI Express didn't evolve in the drive industry. It was a replacement for PCI.
--
John Larkin Highland Technology Inc
www.highlandtechnology.com jlarkin at highlandtechnology dot com
Precision electronic instrumentation
Picosecond-resolution Digital Delay and Pulse generators
Custom timing and laser controllers
Photonics and fiberoptic TTL data links
VME analog, thermocouple, LVDT, synchro, tachometer
Multichannel arbitrary waveform generators
I never said it did, you dippy twit. Learn to read.
Ummm, no. It is STILL tertiary to the main PCI bus, which is STILL the master. PCIe was made as the replacement bus for the AGP video bus, It was an evolution of the PCI bus. The AGP bus simply wasn't quite quick enough.
Motherboards still have PCI slots, and PCI cards are still sold EVERYWHERE computer cards are sold. PCI is STILL the master bus on the board, and all else is tertiary to it, with PCIe being at the same level with direct hooks to the memory bus. It is what replaced the AGP graphics bus, which is what was not robust enough and it gets direct hooks, but all other busses are tertiary to and controlled by the PCI bus.
PCI and PCI 32 still exist, but are dying out because their capacity is not up to modern data rates.
Super Micro (among others) still puts PCI 32 slots on their motherboards and there are still PCI 32 SCSI controllers and the like in the channel, and PCI itself is still found on nearly all motherboards.
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