It appears as thought the low pass filters in PSpice have a rather long phase delay. Is this characteristic exagerated in PSpice or is that what I could typically see in the real world? I'm trying to implement a Costas loop, and I just cant get my vco to catch up with my RF. It appears as though the delays through the filters are too long.
Anyone every do anything like a costas loop in PSice before?
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J
Jim Thompson
What low pass filters are you speaking of?
Are you aware that PLL's need a lead-lag filter? A pure low pass will be slo-o-o-ow to lock, or may not lock at all.
I just remembered this model....
Ideal Voltage controlled oscillator models
Modeled by BJanewicz
4/15/00
*
Recommendation: Set ITL4=40 and specify a maximum time step to avoid
convergence errors.
Explanation of terms
Parameter Description (default units)
Fcenter = Center frequency for oscillator (Hertz)
Frange = Plus and minus range of frequency (Hertz)
Vmin = Minimum voltage which produces the frequency Fc-Fr (Voltage)
Vmax = Maximum voltage which produces the frequency Fc+Fr (Voltage)
Phase = Phase of output wave (degrees)
*$ ..subckt vco_sin in out Params: Fcenter=1k Frange=50 Vmin=0 Vmax=5
+phase=0
Rin in 0 1G Rtable table 0 1G
Etable table 0 Value {Table(V(in),Vmin,-1,Vmax,1)}
| James E.Thompson, P.E. | mens |
| Analog Innovations, Inc. | et |
| Analog/Mixed-Signal ASIC\'s and Discrete Systems | manus |
| Phoenix, Arizona Voice:(480)460-2350 | |
| E-mail Address at Website Fax:(480)460-2142 | Brass Rat |
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K
Kevin Aylward
A PLL will lock without a filter at all.
If a filter is used it needs to be a lag-lead otherwise the loop will be unstable, not because it might be slow without a lead.
Kevin Aylward snipped-for-privacy@anasoft.co.uk
formatting link
SuperSpice, a very affordable Mixed-Mode Windows Simulator with Schematic Capture, Waveform Display, FFT's and Filter Design.
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