1. Home
  2. Electronics Computer-Aided Design
  3. how to measure power dissipated in a digital circuit

how to measure power dissipated in a digital circuit

I was reading a paper on "LOW-POWER DIGIT-SERIAL MULTIPLIER" And I came accross a problem of how they measured the power dissipated in the Multiplier which they have designed. It said on a paper that,they are using HEAT:Hierarchical Energy Analysis Tool,which is based on SPICE. I discussed with my Prof about this,but he adviced me not to use a HSPICE (which is available in our Uni) because a Multiplier is too big a circuit to use HSPICE. My question is how to Am I going to measure power dissipated in a digital circuit(in this case a Multiplier)

Thanks in advance, Chris

Reply to
Christopher Denis
Loading thread data ...

I'm not that familiar with HSpice anymore. Quite a few years ago, when I last used it, I found it to have the worst GUI ever conceived by man ;-)

However, try this:

Display "I(VDD)"... you will see lots of current spikes.

Then (this works with PSpice, don't know about HSpice):

Display "avg(I(VDD))", since VDD is a constant, this display multiplied by VDD will be your average power, or HEAT.

...Jim Thompson

--
|  James E.Thompson, P.E.                           |    mens     |
|  Analog Innovations, Inc.                         |     et      |
 Click to see the full signature
Reply to
Jim Thompson

Mr Smith, Thanks for your kind reply. linear.com is going to be a useful link for me.

In fact,In my research,I want to measure and compare the power dissipated by more than two multipliers. You have mentioned that CPLD and FPGA tools contains a power estimator.I think,they might be useful.

I will post again,when in need for further assistance, Thanks a lot. Chris

Reply to
ntyangiri

I assume you mean calculate and not measure. If you really want to measure it you need to build one.

If you want to calculate it, you need to get a completed design ready as though you were going to put it into real silicon. A lot of CPLD and FPGA tools contain a power estimator.

How many parts are in the design? Are you doing it transistor by transistor?

formatting link
has an unlimited spice on its web site. It is called SwitcherCad-III for historical reasons. You could feet it your schematic or netlist and let it run until you get an answer. Computer time is cheap these days.

--
--
kensmith@rahul.net   forging knowledge
Reply to
Ken Smith

"Christopher Denis" schrieb im Newsbeitrag news: snipped-for-privacy@posting.google.com...

Hello Chris, a multiplier may have many very similar circuit blocks. You simply calculate the power dissipation of one block and assume that N-blocks require N-times that power.

Another approach is trying to calculate how many transition you have per multiplication. If you know also how many gates are conencted to those nets, then you can make a good estimation about the power dissipation. The power dissipation for one net is U^2*C*f plus some additional power in the transition. The power dissipation of a single gate could be simulated with SPICE for this approach.

A serial multiplier may have only a few thousend transistors. You should give HSPICE or LTSPICE a try. LTSPICE is a free and powerful SPICE simulation program.

formatting link
SwitcherCADIII/LTspice

Best Regards, Helmut

Reply to
Helmut Sennewald

I guess your advisor was trying to say: "Do not analyze this digital circuit by transforming it into analog circuit" because it is a big task.

But it would be necessary to do some analog simulation "locally" instead "globally" to have a good estimate. You might as well try

formatting link
to see if you can get any useful information over there...

Reply to
oookhc

ElectronDepot website is not affiliated with any of the manufacturers or service providers discussed here. All logos and trade names are the property of their respective owners.