Some code I've seen has equates for the TRISA and TRISB registers as
05,06 or 85,86. If Bank 1 is selected, does it matter whether address 05 or 85 is chosen? Are the higher addresses used just for code readability?
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A
Andy Wood
What PIC ar you using? For the ones I have used, MPASM would generate the same code for an instruction like CLRF TRISA regardless of whether TRISA was equated to h'05' or h'85'. However, if you did something like BANKSEL TRISA you could get into trouble if TRISA was equated to 05.
Andy Wood snipped-for-privacy@trap.ozemail.com.au
S
scholtenorama
Thanks,
Its a PIC16F84A . I'm trying to get my head around the bank switching. I understand that reading/writing GPRs whilst bank 1 is selected will read/write their bank 0 values. Consensus seems to be to use address 85 (86 for TRISB).
Andy Wood wrote:
A
Andy Wood
If you look at fig 2.2 in the PIC16F84A data sheet you will see that the ram bytes 8C-CF are the same as 0C-4F, so it does not matter what bank you are in when you access them. Some of the SFRs work the same way, for example INTCON and PCLATH, but for other SFRs including TRISA and TRISB you have to have the correct bank selected. One way to select the bank is to use BANKSEL, which for the 16F84A will generate BCF or BSF instructions to clear or set RP0 in the STATUS register - if TRISA is incorrectly equated to 05 BANKSEL will select the wrong bank. If you don't use BANKSEL you might get away with it, but I don't see any reason to live dangerously.
Andy Wood snipped-for-privacy@trap.ozemail.com.au
S
scholtenorama
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