Hello ,
Several years ago when I designed my first PCI add -in card for a wintel platform I discovered that back to back CPU reads of the PCI card's memory address space did not get burst but instead where sent as two seperate frames. Each frame had only a single read. The result was that the CPU could only acheive a 6 Mbytes per sec read bandwidth vs 55 or so if the reads where burst. (32bit PCI bus @ 33 MHZ less overhead )
Now I am embarking on a PCI Express design. I would like to know if this has been corrected so that CPUs on wintel plarforms can do burst reads across the PCI Express bus.
Thanks Dan,