Re: edge card connectors and high speed design

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    Just some anecdotal evidence.  We had a fairly simple multi-card PCI
setup where we had to use very short line-lengths to an on-card PCI bridge
for each card because the signals with simple daughter cards were unusable.
Known impedance and proper termination is critical even at the PCI's 33/66
MHz.  200 MHz would be many times worse.

    Norm



Re: edge card connectors and high speed design
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As a straw man, consider PCI.  It runs a bit faster than 40 ns, but
it doesn't get anywhere near 18 slots.


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Usual practice with multidrop back plane busses is to make that stub
as short as possible and live with it.  (no termination)  It screws
things up, generally by looking like a small cap which reduces the
effective impedance of the backplane.  (Same math as a row of
memory chips on a bus.)

Sometimes with things like this, you can gain a factor of 2 by
putting the master card in the middle and splitting the bus into
two.  Or you split it into 4 and interlace the cards on each side.

One thing to consider is putting terminators at each end of the
backplane and using something other than LVTTL.

I expect you will be doing lots of simulations.  Please let us
know what you decide to build and/or how well it works.

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