If suppose i received a HDL code for FPGA related design and it is obfuscated, how to understand it??? Is there any systematic procedure to perform it??
Thank you in advance.
Regards, SUMATHI G.
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It could be a nightmare. If you just want to view it as blackbox then run a testbench of your own with your inputs and reference outputs. Many designers have no mercy about readability or comments or documentation.
Alternatively post this on DSPRelated and I guarantee you will get 89 replies at least from the 5 robots there. Seriously
Kaz
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Wouldn't hold out much hope. On anything sufficiently complex you can have a full description of the low-level implementation, but not enough context to give full understanding of what is actually being implemented.
e.g. Take this description - what does it do?
There is a single bit register, and it gets XORed with the value that is fr om a 1-bit x 256 table, indexed by the 8-bit input, After that the 8-bit nu mber plus the bit is used to index another 10-bit x 512 table, containing s eemingly random values, to generate the final output value.
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