Frankenstein Processors

I am setting up the register definitions and initialization constants for a new processor. As a peripheral rich product, there are over 400 registers defined for the part. For the most part, the registers initialize to zero. Most bits, whether defined or not, are R/W. They read as zero, and must be written as zero. But there are exceptions: Undefined bits that Read as Zero, but must be written as ones.

There is one register on the part that assigns DMA control pins. It is an 8 bit register with two bits assigned to each of 4 DMA controllers. But there is only one valid setting for the four two bit combinations. The other values are prohibited. Setting these bits to zero is defined as prohibited, yet the reset value of the register is 0x00! Hopefully this is just an errata, but if not, it does not inspire a lot of confidence.

It seems like processors now carry such a feature rich set of peripherals that each pin has 4 to 6 possible functions. The initialization is no longer trivial. And recovery from erratic events becomes harder. We always include a full programmed defined initialization sequence as part of the startup sequence (which is why I am creating and verifying the definitions).

I understand that there is a lot of logic in the chip. I can understand sub-setting where bits are defined in higher performance members of a product family. But surely there is enough space for inverters and read back logic to keep a consistent set of bit definitions. It seems like more and more products are just being sewn together Frankenstein style rather than being carefully thought out. Anyone else seeing this. What about ARM based products/

b. Farmer

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Bit Farmer
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I have seen microcontrollers like this. First it looks like it is a bit complicated and not a very orthogonal design, but most of the time you can solve the problems you have with it and the peripherals are very useful, e.g. the Cypress CapSense chips. For simpler tasks, e.g. if you don't need dynamic reconfiguration at runtime, the Cypress IDE is nice and you don't have to fiddle with the registers.

With CPLDs and FPGAs it is even more complicated, if you would program it by hand, which many times is not possible at all, because the manufacturers don't document the gates in detail and nearly nothing about the configuration bitstream.

Maybe this is the future of high integrated chips. You'll get only a high-level interface, which hides the complexity of the underlying hardware and allows you to concentrate on your problem. Even with smaller microcontrollers, there are some ROM functions in the chip, which you can use e.g. to burn the flash in-system and you don't have to read and implement complicated specifications.

Of course, the drawback is, if you want to do something the manufacturer didn't anticipated, you are out of luck.

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Frank Buss, fb@frank-buss.de
http://www.frank-buss.de, http://www.it4-systems.de
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Frank Buss

Am Fri, 01 Aug 2008 11:19:48 -0500 schrieb Bit Farmer:

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Well, ARM... Intel/Marvell PXA255 and PXA270 were OK but I don't think the designers had their heads straight when they designed the PXA320. You have 8 functions per pin (well, 3 bits. They aren't used fully) and whenever a pin isn't a GPIO you can't read it's level. Hu? And the DMA for the camera interface is different from the rest (it doesn't stop by itself). This was much more consistent in the PXA270.

Vitus

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Vitus Jensen, Hannover, Germany, Earth, Milky Way, Universe (current)
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Vitus Jensen

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